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SctPixelRod Namespace Reference

DummyVmeInterface.h version 1.2. More...


Data Structures

class  baseException
 This is a general exception base class for ROD software. More...

class  BaseException
class  BocCard
 BocCard: A class for setting-up etc. the BOC. This class contains the methods to set up a BOC. The name BocCard was chosen because the possibly more obvious "BocModule" implies that this class is derived from VmeModule. In fact it relies on RodModule for the interface to the BOC. More...

class  BocException
 BocException: general exception class for BOC-specific errors. This class is thrown if an error specific to the BocCard class is encountered. Typically this is if a value in an argument is outside the valid range. An exception is now also thrown if the BOC_BUSY bit does not clear in one second - this is to avoid a hangup on the setup bus. The class inherits from BaseException. More...

class  DummyVmeInterface
class  HpiException
 This is an exception class for Host Port Interface errors. It inherits from BaseException, adding the expected and actual addresses. More...

class  NoImageFile
 This is an exception class for when a binary image file is not found. It inherits from BaseException, adding the name of the missing file as a data member. More...

class  PrimListException
 This is a class to handle exceptions in the PrimList Class. More...

class  RCCVmeInterface
class  rodException
 This is a general exception class for ROD errors. More...

class  RodException
class  RodModule
 RodModule: This is a derived class providing the software interface for VME ROD modules. More...

class  RodOutList
 This is a class for ROD reply buffers. More...

class  RodPrimitive
class  RodPrimList
 This is a list of RodPrimitives to be sent to the RodModule. More...

class  RodStatus
 This is a class for ROD status reports. More...

class  TimException
 TimException: a general exception class for TIM errors. More...

class  TimModule
 TimModule: A derived class for VME TIM modules. More...

class  VmeException
 Vme Exception class; an object of this type is thrown in case of a VME error. More...

class  VmeInterface
class  VmeInterruptHandler
 Vme Interrupt Handler class; abstract base class for Interrupt Handlers. More...

class  VmeModule
class  VmePort

Enumerations

enum  bocBpmRegisters { BOC_BPM_INHIBIT, BOC_BPM_MARK_SPACE, BOC_BPM_COARSE, BOC_BPM_FINE }
enum  boc_reset_bits {
  BOC_OK_RESET_BIT, BOC_VPIN_RESET_BIT, BOC_RXDAC_CLEAR_BIT, BOC_TXDAC_CLEAR_BIT,
  BOC_BPM_RESET_BIT
}
enum  boc_pre_production_status_bits {
  BOC_PRE_PRODUCTION_SW1, BOC_PRE_PRODUCTION_SW4, BOC_PRE_PRODUCTION_SW5, BOC_PRE_PRODUCTION_SW6,
  BOC_PRE_PRODUCTION_RODSENSE, BOC_PRE_PRODUCTION_LOCLASEN, BOC_PRE_PRODUCTION_REMLASEN
}
enum  boc_production_status_bits {
  BOC_PRODUCTION_BOCOK, BOC_PRODUCTION_VBOK, BOC_PRODUCTION_VAOK, BOC_PRODUCTION_ERRFLAG,
  BOC_PRODUCTION_RODSENSE, BOC_PRODUCTION_LOCLASEN, BOC_PRODUCTION_REMLASEN
}
enum  boc_rx_data_mode_values {
  BOC_RX_DATA_MODE_NORMAL, BOC_RX_DATA_MODE_TIMING, BOC_RX_DATA_MODE_PIXEL2, BOC_RX_DATA_MODE_PIXEL1,
  BOC_RX_DATA_MODE_CLOCK, BOC_RX_DATA_MODE_TRANSPARENT
}
enum  boc_clk_control_bits {
  BOC_CLOCK_INVERT, BOC_CLOCK_HALF, BOC_CLOCK_VERNIER_BYPASS, BOC_CLOCK_BPMPH_BYPASS,
  BOC_CLOCK_PHOS4_FIX
}
enum  rrif_status_1_bits { BOC_BUSY_0 }
enum  TextBuffState { TEXT_IDLE, TEXT_RQ_SET, TEXT_READOUT, TEXT_ERROR }
enum  PrimState {
  PRIM_IDLE, PRIM_LOADED, PRIM_EXECUTING, PRIM_WAITING,
  PRIM_PAUSED
}
enum  TEXT_BUFFER_TYPE {
  TEXT_ERR, TEXT_INFO, TEXT_DIAG, TEXT_XFER,
  TEXT_UNDEF
}
enum  HpidMode { DYNAMIC, AUTO, NO_AUTO }
enum  TimTimingSCT {
  TIM_L1A_DEADTIME, TIM_ECR_DEADTIME, TIM_BCR_DEADTIME, TIM_CAL_DEADTIME,
  TIM_BCID_OFFSET
}
 Define timing in clock cycles for SCT, Pixel is different. More...

enum  TimRegister {
  TIM_REG_ENABLES, TIM_REG_COMMAND, TIM_REG_BURST_COUNT, TIM_REG_FREQUENCY,
  TIM_REG_WINDOW, TIM_REG_DELAY, TIM_REG_STATUS, TIM_REG_FIFO_STATUS,
  TIM_REG_TRIGGER_IDLO, TIM_REG_TRIGGER_IDHI, TIM_REG_TRIGGER_BCID, TIM_REG_TRIGGER_TYPE,
  TIM_REG_RUN_ENABLES, TIM_REG_SEQ_CONTROL, TIM_REG_SEQ_END, TIM_REG_ROD_MASK,
  TIM_REG_ROD_BUSY, TIM_REG_ROD_LATCH, TIM_REG_ROD_MONITOR, TIM_REG_TTC_DATA,
  TIM_REG_TTC_SELECT, TIM_REG_TTC_BCID, TIM_REG_TTC_RX, TIM_REG_TTC_STATUS,
  TIM_REG_OUTPUT, TIM_REG_TIM_ID
}
 Define register offsets in bytes. More...

enum  TimBitEnables {
  TIM_BIT_EN_INT_TRIG, TIM_BIT_EN_INT_ECR, TIM_BIT_EN_INT_BCR, TIM_BIT_EN_RANDOM,
  TIM_BIT_EN_INT_FER, TIM_BIT_EN_WINDOW, TIM_BIT_EN_INT_BUSY, TIM_BIT_EN_EXT_CLK,
  TIM_BIT_EN_EXT_TRIG, TIM_BIT_EN_EXT_ECR, TIM_BIT_EN_EXT_BCR, TIM_BIT_EN_EXT_CAL,
  TIM_BIT_EN_EXT_FER, TIM_BIT_EN_EXT_SEQ, TIM_BIT_EN_EXT_BUSY
}
 Define register bits as masks. More...

enum  TimMaskFrequency {
  TIM_MASK_TRIG_100_KHZ, TIM_MASK_TRIG_10_0KHZ, TIM_MASK_TRIG_1_00KHZ, TIM_MASK_TRIG_0_10KHZ,
  TIM_MASK_FER_10_00HZ, TIM_MASK_FER_1_000HZ, TIM_MASK_FER_0_100HZ, TIM_MASK_FER_0_010HZ
}
enum  TimBitBackplane {
  TIM_L1A, TIM_ECR, TIM_BCR, TIM_CAL,
  TIM_SID, TIM_STT, TIM_CMD, TIM_RES,
  TIM_FER, TIM_SPA, TIM_TRG
}
 Applies to Sequencer and Output. More...

enum  TimBitCommand {
  TIM_VTRG, TIM_VECR, TIM_VBCR, TIM_VCAL,
  TIM_VFER, TIM_VSPA, TIM_BIT_VRESET
}
 Applies to Command register. More...

enum  TimBitRunEnables { TIM_BIT_EN_ID, TIM_BIT_EN_TYPE }
enum  TimBitSeqControl { TIM_BIT_SEQ_EN_ALL, TIM_BIT_SEQ_RESET, TIM_BIT_SEQ_GO, TIM_BIT_EN_CYCLIC }
enum  exceptType {
  BASE, VME, NOIMAGEFILE, HPI,
  ROD, PRIMLIST, TIM, BOC
}

Variables

const unsigned long BOC_ADDRESS_BASE
const unsigned long BOC_ADDRESS_WINDOW
const unsigned long BOC_REGISTER_WIDTH
const unsigned long BOC_BPM_BASE
const unsigned long BOC_BPM_INHIBIT_WIDTH
const unsigned long BOC_BPM_MARK_SPACE_WIDTH
const unsigned long BOC_BPM_COARSE_WIDTH
const unsigned long BOC_BPM_FINE_WIDTH
const unsigned long BOC_LASER_DAC
const unsigned long BOC_DATA_DELAY
const unsigned long BOC_DATA_DELAY_WIDTH
const unsigned long BOC_STROBE_DELAY
const unsigned long BOC_STROBE_DELAY_WIDTH
const unsigned long BOC_THRESHOLD_DAC
const unsigned long BOC_TRANSMIT_CHANNELS
const unsigned long BOC_RECEIVE_CHANNELS
const unsigned long BOC_STROBE_CHANNELS
const unsigned long BOC_BPM_CLK_PHASE
const unsigned long BOC_BREG_CLK_PHASE
const unsigned long BOC_VERNIER_CLK0_PHASE
const unsigned long BOC_VERNIER_CLK0_WIDTH
const unsigned long BOC_VERNIER_CLK1_PHASE
const unsigned long BOC_VERNIER_CLK1_WIDTH
const unsigned long BOC_RESET
const unsigned long BOC_BPM_RESET
const unsigned long BOC_TXDAC_CLEAR
const unsigned long BOC_RXDAC_CLEAR
const unsigned long BOC_STATUS
const unsigned long BOC_RX_DATA_MODE
const unsigned long BOC_RX_DATA_MODE_WIDTH
const unsigned long BOC_VERNIER_FINE_PHASE
const unsigned long BOC_CLK_CONTROL
const unsigned long BOC_CLK_CONTROL_WIDTH
const unsigned long BOC_FW_REV
const unsigned long BOC_HW_REV
const unsigned long BOC_MODULE_TYPE
const unsigned long BOC_MANUFACTURER
const unsigned long BOC_SERIAL_NUMBER
const unsigned long BOC_ADC_SETUP
const unsigned long BOC_ADC_CONFIG
const unsigned long BOC_ADC_CONVERT
const unsigned long BOC_ADC_LSB
const unsigned long BOC_ADC_MSB
const unsigned long BOC_ADC_MSB_WIDTH [2]
const unsigned long BOC_MONITOR_CHANNELS
const unsigned long RRIF_STATUS_1_ADDRESS
const unsigned int PRE_PRODUCTION_BOC
 Parameters needed by BocCard.

const unsigned int PRODUCTION_REVA_BOC
const unsigned int PRODUCTION_REVB_BOC
const unsigned int PRODUCTION_REVC_BOC
const unsigned int MONITOR_CURRENT
 BOC Monitor ADC parameters.

const unsigned int MONITOR_VOLTAGE
const unsigned int MONITOR_TEMP
const unsigned int MONITOR_CHANNEL_TYPE [BOC_MONITOR_CHANNELS]
const double iArevA
 Now the factors used in the calculations.

const double iBrevA
const double vArevA
 Voltages.

const double vBrevA
const double tArevA
 Temperatures.

const double tBrevA
const double tC0revA
const double tC1revA
const double tC2revA
const double iArevB
 Now Rev B parameters Currents.

const double iBrevB
const double vArevB
 Voltages.

const double vBrevB
const double tArevB
 Temperatures.

const double tBrevB
const double tC0revB
const double tC1revB
const double tC2revB
const double iArevC
 and Rev C parameters Currents

const double iBrevC
const double vArevC
 Voltages.

const double vBrevC
const double tArevC
 Temperatures.

const double tBrevC
const double tC0revC
const double tC1revC
const double tC2revC
const unsigned long PRIM_BUFF_BASE
const unsigned long PRIM_BUFF_SIZE
const unsigned long REPLY_BUFF_BASE
const unsigned long REPLY_BUFF_SIZE
const unsigned long TEXT_BUFF_SIZE
const unsigned long ERR_BUFF_BASE
const unsigned long INFO_BUFF_BASE
const unsigned long DIAG_BUFF_BASE
const unsigned long XFER_BUFF_BASE
const unsigned long STATUS_REG [3]
const unsigned long COMMAND_REG [2]
const unsigned long SLAVE_HPIC_BASE
const unsigned long SLAVE_HPIA_BASE
const unsigned long SLAVE_HPID_AUTO_BASE
const unsigned long SLAVE_HPID_NOAUTO_BASE
const unsigned long SLAVE_HPI_OFFSET
const unsigned long SLAVE_EMIF_ADDR
const unsigned long SLAVE_IPRAM_ADDR
const unsigned long SLAVE_IDRAM_ADDR
const unsigned long SLAVE_CE2_ADDR
const unsigned long SLAVE_PRIM_BUFF_SIZE
const unsigned long SLAVE_REPLY_BUFF_SIZE
const unsigned long SLAVE_PRIM_BUFF_BASE
const unsigned long SLAVE_REPLY_BUFF_BASE
const long DSP_RESET_TIMEOUT
const unsigned long OUTLIST_READY
const unsigned long DSPACK
const unsigned long TEXT_BUFF_NOT_EMPTY [4]
const unsigned long SR_TEXT_BIT_MASK [4]
const unsigned long SR_TEXT_MASK
const unsigned long INLISTRDY
const unsigned long TEXT_BUFF_READ_REQ [4]
const unsigned long HPIC
const unsigned long HPIA
const unsigned long HPID_AUTO
const unsigned long HPID_NOAUTO
const long MAX_HPID_WORD_ELEMENTS
const unsigned long FLASH_ADDR_WRITEDATA_REG
const unsigned long FLASH_CONTROL_REG
const unsigned long FPGA_CONTROL_REG_REL_ADDR [8]
const unsigned long FPGA_STATUS_REG_REL_ADDR [8]
const unsigned long MDSP_FLASH_BOTTOM
const unsigned long MDSP_FLASH_SIZE
const unsigned long FPGA_FLASH_0_BOTTOM
const unsigned long FPGA_FLASH_1_BOTTOM
const unsigned long FPGA_FLASH_2_BOTTOM
const unsigned long FPGA_FLASH_REL_ADDR_REVE
const unsigned long FLASH_MEMORY_SIZE
const unsigned long FLASH_MEMORY_SIZE_REVE
const unsigned long FLASH_SECTOR_SIZE
const unsigned long FLASH_SECTOR_SIZE_REVE
const double FLASH_TIMEOUT
const unsigned long CHIP_ERASE_TIME_MS
const unsigned long SECTOR_ERASE_TIME_MS
const unsigned long READ_HANDSHAKE_BIT
const unsigned long WRITE_COMMAND_HANDSHAKE_BIT
const unsigned long WRITE_DATA_HANDSHAKE_BIT
const unsigned long NUMBER_OR_SECTORS
const unsigned long NUMBER_OF_SECTORS_REVE
const INT32 TIM_L1ID_FIRST
 triggers

const INT32 TIM_SEQ_SIZE
 bytes

const INT32 TIM_SEQ_ADDR
 bytes


Detailed Description

DummyVmeInterface.h version 1.2.

BocAddresses.h is a wrapper around the testBench C code header file memoryPartitions.h. This wrapper adapts things to appear more like C++ and to declare things const so the compiler can catch attempts to change them in the code. Only BOC addresses appear in this file. If a register has a width that differs from BOC_REGISTER_WIDTH (which is set = 8 as the setup bus width, this is also defined.

Author:
: J.C.Hill (hill@hep.phy.cam.ac.uk)


Enumeration Type Documentation

enum SctPixelRod::TimBitBackplane
 

Applies to Sequencer and Output.

Enumeration values:
TIM_L1A  Level-1 Accept trigger.
TIM_ECR  Event Counter Reset.
TIM_BCR  Bunch Counter Reset.
TIM_CAL  Calibrate strobe.
TIM_SID  Serial event ID.
TIM_STT  Serial Trigger Type.
TIM_CMD  Commands available.
TIM_RES  Commands reserved.
TIM_FER  Front-End Reset - reserved.
TIM_SPA  Spare command - reserved.
TIM_TRG  Trigger and serial streams.

Definition at line 113 of file TimDefine.h.

enum SctPixelRod::TimBitCommand
 

Applies to Command register.

Enumeration values:
TIM_VTRG  Single VME Trigger.
TIM_VECR  Single VME ECR.
TIM_VBCR  Single VME BCR.
TIM_VCAL  Single VME CAL.
TIM_VFER  Single VME FER.
TIM_VSPA  Single VME SPA.

Definition at line 127 of file TimDefine.h.

enum SctPixelRod::TimBitEnables
 

Define register bits as masks.

Enumeration values:
TIM_BIT_EN_INT_TRIG  Enable internal repetitive Trigger.
TIM_BIT_EN_INT_ECR  Enable internal repetitive ECReset.
TIM_BIT_EN_INT_BCR  Enable internal repetitive BCReset.
TIM_BIT_EN_RANDOM  Enable internal trigger randomizer.
TIM_BIT_EN_INT_FER  Enable internal repetitive FEReset.
TIM_BIT_EN_WINDOW  Enable trigger window.
TIM_BIT_EN_INT_BUSY  Enable internal Busy.
TIM_BIT_EN_EXT_CLK  Enable external inputs: clock.
TIM_BIT_EN_EXT_TRIG  Enable external inputs: trigger.
TIM_BIT_EN_EXT_ECR  Enable external inputs: ECReset.
TIM_BIT_EN_EXT_BCR  Enable external inputs: BCReset.
TIM_BIT_EN_EXT_CAL  Enable external inputs: Calibrate.
TIM_BIT_EN_EXT_FER  Enable external inputs: FEReset.
TIM_BIT_EN_EXT_SEQ  Enable external inputs: Sequencer Go.
TIM_BIT_EN_EXT_BUSY  Enable external inputs: Busy.

Definition at line 82 of file TimDefine.h.

enum SctPixelRod::TimRegister
 

Define register offsets in bytes.

Definition at line 51 of file TimDefine.h.

enum SctPixelRod::TimTimingSCT
 

Define timing in clock cycles for SCT, Pixel is different.

Definition at line 33 of file TimDefine.h.


Variable Documentation

const double SctPixelRod::iArevA
 

Now the factors used in the calculations.

First the Rev A parameters Currents

Definition at line 53 of file BocCard.h.

const double SctPixelRod::iArevB
 

Now Rev B parameters Currents.

Definition at line 67 of file BocCard.h.

const double SctPixelRod::iArevC
 

and Rev C parameters Currents

Definition at line 81 of file BocCard.h.

const unsigned int SctPixelRod::MONITOR_CURRENT
 

BOC Monitor ADC parameters.

There are three types of channel: PIN Current, PIN Voltage and Thermistor temperature for each of Rev A, Rev B and Rev C production boards. Define the channel types and identify them - the number of channels is defined in BocAddresses.h along with the register addresses.

Definition at line 33 of file BocCard.h.

const unsigned int SctPixelRod::PRE_PRODUCTION_BOC
 

Parameters needed by BocCard.

Identifiers for types of BOC, as defined in m_bocType. These values are the upper 3 bits of the Hardware Revision register which are now (from 3 March 2004) used to identify the PCB version.

Definition at line 21 of file BocCard.h.

const double SctPixelRod::tArevA
 

Temperatures.

Definition at line 59 of file BocCard.h.

const double SctPixelRod::tArevB
 

Temperatures.

Definition at line 73 of file BocCard.h.

const double SctPixelRod::tArevC
 

Temperatures.

Definition at line 87 of file BocCard.h.

const INT32 SctPixelRod::TIM_L1ID_FIRST
 

triggers

Definition at line 41 of file TimDefine.h.

const INT32 SctPixelRod::TIM_SEQ_ADDR
 

bytes

Definition at line 47 of file TimDefine.h.

const INT32 SctPixelRod::TIM_SEQ_SIZE
 

bytes

Sequencer RAM is 16K bytes for both source and sink memory. They are accessed together as 16K 16-bit words.

Definition at line 46 of file TimDefine.h.

const double SctPixelRod::vArevA
 

Voltages.

Definition at line 56 of file BocCard.h.

const double SctPixelRod::vArevB
 

Voltages.

Definition at line 70 of file BocCard.h.

const double SctPixelRod::vArevC
 

Voltages.

Definition at line 84 of file BocCard.h.


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