TxDelay

The BOC has two TxDelay registers for keeping the phase of the Tx signal wrt to the 25ns clock: Fine delay register and coarse delay register .

BPM12 chip has 7 bits fine delay adjustment from 0 to 35nsec and the course delay, which has 5 bits, is in increments of "bunch-crossings" and used to delay the L1 if it arrives before 128bcos.

The configuration file has two 8 bits to store the information as such: 0b 000ccccc 0ttttttt where c = coarse and t = fine delay. The maximum delay is hence 0x1f7f.

See TimingIn