General Requirements:

• Requires LabView V5.0 or later
• I recommend a fast PC. I use a 450MHz PIII machine with 128MB RAM, which gives an
  event rate of ~20Hz with full event analysis and real-time histogramming.

• National Instruments VME-MXI-2 interface
• SEQSI
• Corbo (CES RCB 8047)
• Sirocco - both old and new 40MHz sirocco
• TDC - CAEN V488A

The software package comprises 4 programs:

• runDAQ.vi - full DAQ system, with file management, full event analysis and histogramming etc.
• readData.vi - "playback" of raw data files, with event-by-event analysis
• readHistos.vi - view and analyse saved histograms
• sct128Tool.vi - interactive facility to set up and trigger the chip, ideal for debugging, observing
  the data train, setting up strobes etc

Installation

Download each of the four llb files:

 runDAQ.llb - this will include runDAQ.vi
 ReadSavedData.llb - this will include readData.vi
 ReadHistos.llb - this will include readHistos.vi
 SCT128AExerciser.llb - this will include sct128Tool.vi

You also need to create two files, and a few directories:

• a DAQ configuration file, which defines directory names etc for data storage etc. Download  daqconfig.txt to start with, this is the configuration file I use at Cambridge.
  Then save it as C:\sct128\daqconfig.txt. Look in the file, and manually create the 4 directories listed in it.
• a hardware configuration file, which defines the default chip settings, the choice of sirocco, whether
  TDC is read out etc. Download  default.txt to start with, these are the current settings I use at Cambridge. You can later change the hardware configuration file from runDAQ.vi.
  You must save the default.txt file in the directory 'directory for hardware configuration files' listed in 
  C:\sct128\daqconfig.txt

SEQSI    VXIO::281::INSTR
CORBO    VXIO::282::INSTR
SIROCCO    VXIO::311::INSR
VFAS3    VXIO::256::INSTR
TDC    VXIO::284::INSTR

If you want to have different VISA Resource names, edit the file GetVXIMap.vi and edit the CASE structure
accordingly.

Cabling

For cabling and a very rough NIM logic diagram, click  here.