00001
00007 #include <iostream>
00008 #include <string>
00009
00010 #include "primUtils.h"
00011
00012 #include "utility.h"
00013
00014 #include "registerIndices.h"
00015
00016 #include "Sct/AbcdScans.h"
00017 #include "Sct/AbcdChip.h"
00018
00019 #include "CommonWithDsp/primParams.h"
00020
00021 #ifdef HAVE_PRIM_NAMES
00022
00023 #include "../decodeTestStand/primNames.h"
00024 #include "../decodeTestStand/regNames.h"
00025 static const char *getPrimName(int id);
00026 static const char *getRegName(int id);
00027 static const char *getTaskName(int id);
00028
00029 #endif
00030
00031 using namespace std;
00032 using namespace SctApi::Utility;
00033
00034 namespace SctApi {
00035
00036 void printOutList(unsigned long *result, unsigned long length, bool in, int level, ostream &stream,
00037 bool dumpUnknown, bool dumpRaw) {
00038 if(!result) {
00039 cout << "Invalid pointer to primList\n";
00040 return;
00041 }
00042 if(length < 10) {
00043 cout << "Invalid prim list (too short)\n";
00044 return;
00045 }
00046 unsigned long outLength = result[0];
00047 unsigned long outIndex = result[1];
00048 unsigned long outNumPrims = result[2];
00049 unsigned long outPrimVersion = result[3];
00050
00051 if(!in) {
00052 stream << string(" ", 0, level);
00053 stream << "Outlist decode: \n";
00054 stream << string(" ", 0, level);
00055 stream << "outLength = " << outLength << ", outIndex = " << outIndex <<
00056 ", outNumPrims = " << outNumPrims << ", outPrimVersion = " <<
00057 outPrimVersion <<'\n';
00058 } else {
00059 stream << string(" ", 0, level);
00060 stream << "Inlist decode: \n";
00061 stream << string(" ", 0, level);
00062 stream << "inLength = " << outLength << ", inIndex = " << outIndex <<
00063 ", inNumPrims = " << outNumPrims << ", inPrimVersion = " <<
00064 outPrimVersion <<'\n';
00065 }
00066 unsigned long *outPtr = result + 4;
00067 for (unsigned int j=0; j<outNumPrims; j++) {
00068 unsigned long primLength = *(outPtr++);
00069 unsigned long primIndex = *outPtr++;
00070 unsigned long primId = *outPtr++;
00071 unsigned long primVersion = *outPtr++;
00072 stream << string(" ", 0, level);
00073 stream << "primLength = " << primLength << ", primIndex = " << primIndex <<
00074 ", primId = " << primId << ", primVersion = " << primVersion;
00075 #ifdef HAVE_PRIM_NAMES
00076 stream << " " << getPrimName(primId);
00077 #endif
00078 stream << '\n';
00079 if(in) {
00080 if(primId == SEND_SLAVE_LIST) {
00081 stream << string(" ", 0, level);
00082 stream << " Send list to slave DSP " << outPtr[0] << " length " << outPtr[1] << ":\n";
00083 printOutList(outPtr + 4, outPtr[1], in, level+2, stream, dumpUnknown, dumpRaw);
00084 } else if(primId == START_SLAVE_LIST) {
00085 stream << string(" ", 0, level);
00086 stream << " Start slave list on " << outPtr[0] << endl;
00087 } else if(primId == START_TASK) {
00088 START_TASK_IN &prim = *(START_TASK_IN *)outPtr;
00089
00090 stream << string(" ", 0, level);
00091 int taskId = prim.taskType;
00092
00093 #ifdef HAVE_PRIM_NAMES
00094 stream << "Start task " << getTaskName(taskId) << " (" << taskId << ")" << endl;
00095 #else
00096 stream << "Start task " << " (" << taskId << ")" << endl;
00097 #endif
00098 unsigned long *taskPtr = outPtr + 4;
00099
00100 int tLevel = level + 1;
00101
00102 #if (R_HISTOGRAM_CTRL_TASK == 107)
00103 if(taskId == HISTOGRAM_CTRL_TASK) {
00104 HISTOGRAM_CTRL_TASK_IN &task = *(HISTOGRAM_CTRL_TASK_IN*)taskPtr;
00105 stream << "Histogramming\n";
00106 stream << string(" ", 0, tLevel);
00107 stream << "SlaveBits 0x" << hex << (int)task.slvBits << dec << " Port " << (int)task.port
00108 << " cfgRegs " << (int)task.configRegister[0] << " " << (int)task.configRegister[1] << endl;
00109 stream << string(" ", 0, tLevel);
00110 stream << "ConfigSet " << (int)task.configSctSet << " DataSet " << (int)task.dataSet
00111 << " GroupRangeMaps 0x" << hex << (int)task.groupRangeMap[0]
00112 << " 0x" << (int)task.groupRangeMap[1] << dec << endl;
00113 stream << string(" ", 0, tLevel);
00114 stream << " GroupDspMaps 0x" << hex << (int)task.groupDSPMap[0] << " 0x" << (int)task.groupDSPMap[1]
00115 << " 0x" << (int)task.groupDSPMap[2] << " 0x" << (int)task.groupDSPMap[3] << dec;
00116 stream << " Group SP Maps 0x" << hex << (int)task.groupSPMap[0]
00117 << " 0x" << (int)task.groupSPMap[1] << dec << endl;
00118 stream << string(" ", 0, tLevel);
00119 stream << "Histogram address " << hex << task.histoBase << dec << endl;
00120 stream << string(" ", 0, tLevel);
00121 stream << "do occupancy " << (int)task.doChipOcc << " dataFormat " << (int)task.dataFormat
00122 << " Binsize " << (int)task.binSize << " extSetup " << (int)task.extSetup
00123 << " dataPath " << (int)task.dataPath << " capture " << (int)task.capture
00124 << " useRangeList " << (int)task.useRangeList << endl;
00125 stream << string(" ", 0, tLevel);
00126 stream << "Reps " << task.repetitions << " NBins " << task.nBins << " Bin0 " << task.bin0 << endl;
00127 stream << string(" ", 0, tLevel);
00128 stream << "Data pointers " << task.dataPtr[0] << " " << task.dataPtr[1] << endl;
00129 for(int t=0; t<2; t++) {
00130 stream << "Trigger " << t << endl;
00131 for(int i=0; i<N_CMD_LIST_CMDS; i++) {
00132 stream << task.triggerSequence[t].cmd[i] << ": " << task.triggerSequence[t].data[i] << " ";
00133 }
00134 stream << endl;
00135 }
00136 stream << string(" ", 0, tLevel);
00137 stream << "incCmds " << (int)task.incCmd[0] << " " << (int)task.incCmd[1]
00138 << " calLineLoop " << (int)task.calLineLoop << " DistToggle " << (int)task.distributionToggle
00139 << " incData " << (int)task.incData[0] << " " << (int)task.incData[1]
00140 << endl;
00141 stream << string(" ", 0, tLevel);
00142 stream << "Gendata: ";
00143 hex(stream);
00144 for(int i=0; i<10; i++) stream << " 0x" << task.genData[i];
00145 dec(stream);
00146 stream << endl;
00147 FLOAT32 *dataPtr = (FLOAT32*)(outPtr + sizeof(START_TASK_IN)/4);
00148 stream << string(" ", 0, tLevel+2);
00149 unsigned int count = primLength - (sizeof(START_TASK_IN)/4) - 4;
00150 for(unsigned int b=0; b<count; b++) {
00151 if(b == count/2) {
00152 stream << endl;
00153 stream << string(" ", 0, tLevel+2);
00154 }
00155 stream << dataPtr[b] << " ";
00156 }
00157 stream << endl;
00158 } else
00159 #else
00160 #warning "Debug output for HISTOGRAM_CTRL_TASK not compiled!"
00161 #endif
00162 if(taskId == HISTOGRAM_TASK) {
00163 HISTOGRAM_TASK_IN &task = *(HISTOGRAM_TASK_IN*)taskPtr;
00164 stream << string(" ", 0, tLevel);
00165 stream << "NEvents " << task.nEvents << " controlFlag = " << task.controlFlag << endl;
00166 } else {
00167 if(dumpUnknown)
00168 printMemoryBlock(stream, outPtr+4, primLength-8, 8, level+1);
00169 }
00170 } else if(primId == RW_SLAVE_MEMORY) {
00171 stream << string(" ", 0, level+1);
00172 stream << (outPtr[1]?"READ":"WRITE") << " 0x" << hex << outPtr[4] << dec << " words " << (outPtr[1]?"from":"to") << " slave " << outPtr[0] << " address 0x" << hex << outPtr[2] << dec << endl;
00173 if(dumpRaw)
00174 printMemoryBlock(stream, outPtr+5, primLength-9, 8, level+1);
00175 } else if(primId == RW_REG_FIELD) {
00176 RW_REG_FIELD_IN &prim = *(RW_REG_FIELD_IN *)outPtr;
00177 stream << string(" ", 0, level+1);
00178 stream << (prim.readNotWrite?"READ":"WRITE")
00179 << " register 0x" << hex << prim.registerID << dec
00180 #if HAVE_PRIM_NAMES
00181 << " (" << getRegName(prim.registerID) << ") "
00182 #endif
00183 << " offset " << prim.offset
00184 << " width " << prim.width;
00185 if(!prim.readNotWrite) {
00186 stream << " data 0x" << hex << prim.dataIn << dec;
00187 }
00188 stream << endl;
00189 #if R_EVENT_TRAP_SETUP == 103
00190 } else if(primId == EVENT_TRAP_SETUP) {
00191 stream << string(" ", 0, level);
00192 stream << " Slaves " << outPtr[0] << " Events " << outPtr[1] << " Timeout: " << outPtr[2] << endl;
00193
00194 stream << string(" ", 0, level);
00195 stream << " Ext: " << outPtr[3] << " Dist: " << outPtr[4] << " Release: " << outPtr[5] << " Back: " << outPtr[6] << endl;
00196 stream << string(" ", 0, level);
00197 stream << " Mode: " << outPtr[7] << " sLink: " << outPtr[8] << " Format: " << outPtr[9] << " Strays: " << outPtr[10] << " IterLimit: " << outPtr[11] << endl;
00198 stream << string(" ", 0, level);
00199 stream << " 0: Config: " << outPtr[12] << " Xclude: " << outPtr[14] << " Function: " << outPtr[16];
00200 stream << " Match: " << outPtr[18] << " Modulus: " << outPtr[20] << " Remainder: " << outPtr[22] << endl;
00201 stream << string(" ", 0, level);
00202 stream << " 1: Config: " << outPtr[13] << " Xclude: " << outPtr[15] << " Function: " << outPtr[17];
00203 stream << " Match: " << outPtr[19] << " Modulus: " << outPtr[21] << " Remainder: " << outPtr[23] << endl;
00204 #else
00205 #warning "Debug output for EVENT_TRAP_SETUP not compiled!"
00206 #endif
00207 #if (R_HISTOGRAM_SETUP == 108)
00208 } else if(primId == HISTOGRAM_SETUP) {
00209 HISTOGRAM_SETUP_IN &prim = *(HISTOGRAM_SETUP_IN *)outPtr;
00210 stream << string(" ", 0, level);
00211 stream << " HistoBase = " << hex << prim.base << dec << " nBins: " << prim.nBins << endl;
00212
00213 stream << string(" ", 0, level);
00214 stream << " DataTypes: " << (int)prim.dataType[0] << " " << (int)prim.dataType[1] << endl;
00215 stream << string(" ", 0, level);
00216 stream << " (Arrangement: " << (int)prim.opt[0] << ") DataFormat: " << (int)prim.opt[1]
00217 << " BinSize: " << prim.binSize << " Routine type: " << prim.routineType
00218 << " (Ignored: " << (int)prim.opt[2] << ")" << endl;
00219
00220 stream << string(" ", 0, level);
00221 stream << " Module Maps: 0x" << hex << prim.validModules[0] << " 0x" << prim.validModules[1] << dec
00222 << " RangeMaps: 0x" << hex << prim.moduleRangeMap[0][0] << " 0x" << prim.moduleRangeMap[0][1]
00223 << " 0x" << prim.moduleRangeMap[1][0] << " 0x" << prim.moduleRangeMap[1][1] << dec << endl;
00224 stream << string(" ", 0, level);
00225 stream << " Data Pointers " << hex << prim.xPtr[0] << " " << prim.xPtr[1] << dec << "\n";
00226 #elif (R_HISTOGRAM_SETUP == 105 || R_HISTOGRAM_SETUP == 107)
00227 } else if(primId == HISTOGRAM_SETUP) {
00228 HISTOGRAM_SETUP_IN &prim = *(HISTOGRAM_SETUP_IN *)outPtr;
00229 stream << string(" ", 0, level);
00230 stream << " HistoBase = " << hex << prim.base << dec << " nBins: " << prim.nBins << endl;
00231
00232
00233 stream << string(" ", 0, level);
00234 stream << " Padding: " << (int)prim.padding[0] << " " << (int)prim.padding[1]
00235 << " DataTypes: " << (int)prim.dataType[0] << " " << (int)prim.dataType[1] << endl;
00236 stream << string(" ", 0, level);
00237 stream << " Arrangement: " << (int)prim.opt[0] << " DataFormat: " << (int)prim.opt[1]
00238 << " BinSize: " << (int)prim.binSize << " (Ignored: " << (int)prim.opt[2] << ")" << endl;
00239
00240 stream << string(" ", 0, level);
00241 stream << " Module Maps: 0x" << hex << prim.validModules[0] << " 0x" << prim.validModules[1] << dec
00242 << " RangeMaps: 0x" << hex << prim.moduleRangeMap[0][0] << " 0x" << prim.moduleRangeMap[0][1]
00243 << " 0x" << prim.moduleRangeMap[1][0] << " 0x" << prim.moduleRangeMap[1][1] << dec << endl;
00244 stream << string(" ", 0, level);
00245 stream << " Data Pointers " << hex << prim.xPtr[0] << " " << prim.xPtr[1] << dec << "\n";
00246 #elif R_HISTOGRAM_SETUP == 104
00247 } else if(primId == HISTOGRAM_SETUP) {
00248 HISTOGRAM_SETUP_IN &prim = *(HISTOGRAM_SETUP_IN *)outPtr;
00249 stream << string(" ", 0, level);
00250 stream << " HistoBase = 0x" << hex << outPtr[0] << dec << " RodType " << outPtr[1] << " nBins: " << outPtr[2] << endl;
00251
00252 unsigned char *charPtr = (unsigned char *)&outPtr[3];
00253 stream << string(" ", 0, level);
00254 stream << " Padding: " << (int)charPtr[0] << " " << (int)charPtr[1] << " DataTypes: " << (int)charPtr[2] << " " << (int)charPtr[3] << endl;
00255 stream << string(" ", 0, level);
00256 stream << " Arrangement: " << (int)charPtr[4] << " DataFormat: " << (int)charPtr[5] << " BinSize: " << (int)charPtr[6] << endl;
00257
00258 stream << string(" ", 0, level);
00259 stream << " Module Maps: 0x" << hex << outPtr[5] << " 0x" << outPtr[6] << dec
00260 << " RangeMaps: 0x" << hex << outPtr[7] << " 0x" << outPtr[8]
00261 << " 0x" << outPtr[9] << " 0x" << outPtr[10] << dec << endl;
00262 stream << string(" ", 0, level);
00263 stream << " Data Pointers " << hex << prim.xPtr[0] << " " << prim.xPtr[1] << dec << "\n";
00264 #else
00265 #warning "Debug output for HISTOGRAM_SETUP not compiled!"
00266 #endif
00267 } else if(primId == WRITE_BUFFER) {
00268 stream << string(" ", 0, level + 1) << " Length " << outPtr[0] << endl;
00269 stream << string(" ", 0, level + 1) << " \"" << string((char *)&outPtr[1], 0, outPtr[0]) << "\"" << endl;
00270 } else if(primId == MODULE_MASK) {
00271 MODULE_MASK_IN &prim = *(MODULE_MASK_IN*)outPtr;
00272 stream << string(" ", 0, level + 1) << " Module " << prim.moduleNum
00273 << " port " << prim.port << " structSet " << prim.useStructSet << " pass to slaves " << prim.passOn
00274 << " slvMask 0x" << hex << prim.slvBits << dec << endl;
00275 stream << string(" ", 0, level + 1)
00276 << " cmdLine " << prim.cmdLine << " dataLine [0] " << prim.dataLine[0] << " [1] " << prim.dataLine[1]
00277 << " [2] " << prim.dataLine[2] << " [3] " << prim.dataLine[3] << endl;
00278 stream << string(" ", 0, level + 1) << " cfg " << prim.cfg
00279 << " modMask 0x" << hex << prim.modMask[0] << " 0x" << prim.modMask[1] << dec
00280 << " maskType " << prim.maskType << " storage " << prim.storage
00281 << " maskSet " << prim.maskSet << endl ;
00282 } else if(primId == RW_MODULE_DATA) {
00283 #if ( (R_RW_MODULE_DATA == 101) || (R_RW_MODULE_DATA == 102) )
00284 stream << string(" ", 0, level + 1) << (outPtr[0]?"Read":"Write")
00285 << " Struct: " << outPtr[1] << " Module: " << outPtr[2] << endl;
00286 stream << string(" ", 0, level + 1) << "Skip module data\n";
00287 #elif (R_RW_MODULE_DATA == 103)
00288 RwModuleDataIn &prim = *(RwModuleDataIn*)outPtr;
00289 stream << string(" ", 0, level + 1) << (prim.fRead?"Read":"Write");
00290 if (prim.fCopy) {
00291 stream << " copy from bank " << prim.copySrcCfgSet;
00292 }else{
00293 stream << " no copy ";
00294 }
00295 if (prim.cfgBitfield) {
00296 stream << " target banks (bitset) " << prim.cfgSet;
00297 }else{
00298 stream << " target bank (single)" << prim.cfgSet;
00299 }
00300 stream << " module " << prim.module << " chip " << prim.chip << " part of config: " << prim.dataType << endl;
00301
00302 size_t longs_before_data = (sizeof(RwModuleDataIn)/4);
00303 stream << " data size = " << primLength-longs_before_data-4
00304 << " (module = " << sizeof(ABCDModule)/4 << "; 12*chip=" << 12*sizeof(ABCDChip)/4
00305 << "; 12*basic=" << 12*sizeof(ABCDBasic)/4 << "; 12*caldata=" << 12*sizeof(ABCDBasic)/4
00306 << "; 12*cfg=" << 12*sizeof(ABCDConfig)/4
00307 << ")" << endl;
00308
00309 #endif
00310 } else if(primId == SET_ROD_MODE) {
00311 SET_ROD_MODE_IN &prim = *(SET_ROD_MODE_IN*)outPtr;
00312 stream << string(" ", 0, level + 1) << " mode 0x" << hex << prim.mode << dec << " flag " << prim.flag
00313 << " fifo " << prim.fifoSetup << " nBits " << prim.nBits << " delay " << prim.delay
00314 << " evtsPerL1A " << prim.evtsPerL1A << " message " << prim.message << endl;
00315 } else if(primId == RW_MODULE_VARIABLE) {
00316 #if (R_RW_MODULE_VARIABLE < 103)
00317 RW_MODULE_VARIABLE_IN &prim = *(RW_MODULE_VARIABLE_IN*)outPtr;
00318 stream << string(" ", 0, level + 1) << " " << (prim.read?"READ":"WRITE") << " struct " << prim.structId
00319 << " group " << prim.groupId << " module " << prim.module << " chip " << prim.chip
00320 << " var " << prim.varType << " data " << (float)*prim.data << endl;
00321 #elif (R_RW_MODULE_VARIABLE == 103)
00322 RwModuleVariableIn & prim = *(RwModuleVariableIn*)outPtr;
00323 stream << string(" ", 0, level + 1) << " " << (prim.fRead?"READ":"WRITE");
00324 if (prim.cfgBitfield) {
00325 stream << " banks (bitfield) " << prim.cfgSet;
00326 }else{
00327 stream << " bank (single) " << prim.cfgSet;
00328 }
00329 stream << " group " << prim.groupId << " module " << prim.module
00330 << " chip 0x" << hex << prim.chip <<dec
00331 << " var " << prim.varType << " info " << prim.info
00332 << " length " << prim.dataLen << " val="
00333 << *(MDAT32*)&outPtr[sizeof(RwModuleVariableIn)/4];
00334 stream << endl;
00335 #else
00336 #error "cannot do print of RwModuleVariableIn as primitive version has changed"
00337 #endif
00338 } else if(primId == SET_MEMORY) {
00339 SET_MEMORY_IN &prim = *(SET_MEMORY_IN*)outPtr;
00340 stream << string(" ", 0, level + 1) << " address" << prim.start << " length " << prim.size
00341 << " value " << prim.val << endl;
00342 } else if(primId == SEND_CONFIG) {
00343 #if (R_SEND_CONFIG == 106)
00344 SendConfigIn &prim = *(SendConfigIn*)outPtr;
00345 stream << string(" ", 0, level + 1) << " port " << prim.port
00346 << " module (" << prim.module[0] << " " << prim.module[1] << ")"
00347 << " chip 0x" << hex << prim.chip << dec << " setLinks " << prim.setLinks << endl;
00348 stream << string(" ", 0, level + 1) << " cfgSet " << prim.cfgSet
00349 << " group = " << prim.groupId << " dataType " << prim.dataType
00350 << " activeOnly " << prim.activeOnly
00351 << " enableDataTaking " << prim.enableDataTaking << endl;
00352 #elif (R_SEND_CONFIG == 105)
00353 SEND_CONFIG_IN &prim = *(SEND_CONFIG_IN*)outPtr;
00354 stream << string(" ", 0, level + 1) << " port " << prim.port << " capture " << prim.captureSerOn
00355 << " moduleNum (" << prim.moduleNum[0] << " " << prim.moduleNum[1] << ")"
00356 << " chipNum 0x" << hex << prim.chipNum << dec << " setLinks " << prim.setLinks << endl;
00357 stream << string(" ", 0, level + 1) << " restore " << prim.restore << " struct " << prim.structId
00358 << " dataType " << prim.dataType << " activeOnly " << prim.activeOnly
00359 << " enableDataTaking " << prim.enableDataTaking << endl;
00360 #elif (R_SEND_CONFIG == 106)
00361 SendConfigIn &prim = *(SendConfigIn*)outPtr;
00362 stream << string(" ", 0, level + 1) << " port " << prim.port
00363 << " moduleNum (" << prim.module[0] << " " << prim.module[1] << ")"
00364 << " chipNum 0x" << hex << prim.chip << dec << " setLinks " << prim.setLinks << endl;
00365 stream << string(" ", 0, level + 1) << " bank " << prim.cfgSet << " group " << prim.groupId
00366 << " dataType " << prim.dataType << " activeOnly " << prim.activeOnly
00367 << " enableDataTaking " << prim.enableDataTaking << endl;
00368 #else
00369 #error "cannot do print of SendConfigIn as primitive version has changed"
00370 #endif
00371 } else if(primId == TASK_OPERATION) {
00372 TASK_OPERATION_IN &prim = *(TASK_OPERATION_IN*)outPtr;
00373 stream << string(" ", 0, level + 1)
00374 << " task "
00375 #ifdef HAVE_PRIM_NAMES
00376 << getTaskName(prim.taskType) << " (" << prim.taskType << ")";
00377 #else
00378 << prim.taskType;
00379 #endif
00380 switch(prim.taskOperation) {
00381 case TASK_STOP: stream << " STOP"; break;
00382 case TASK_PAUSE: stream << " PAUSE"; break;
00383 case TASK_RESUME: stream << " RESUME"; break;
00384 case TASK_QUERY: stream << " QUERY"; break;
00385 case TASK_RESET: stream << " RESET"; break;
00386 case TASK_SETPRIORITY: stream << " SETPRIORITY"; break;
00387 }
00388 stream << " data " << prim.data << endl;
00389 } else {
00390 if(dumpUnknown)
00391 printMemoryBlock(stream, outPtr, primLength-4, 8, level+1);
00392 }
00393 } else {
00394 if(primId == ECHO) {
00395 stream << string(" ", 0, level);
00396 stream << "ECHO Primitive response:\n";
00397 hex(stream);
00398 for (unsigned int i=0; i<primLength-4; i++) {
00399 stream.width(8);
00400 stream << outPtr[i] <<" ";
00401 if (0 == (i+1)%8) {
00402 stream << endl;
00403 stream << string(" ", 0, level);
00404 }
00405 }
00406 if (0 != (primLength-4)%8) stream << endl;
00407 dec(stream);
00408 } else if(primId == SEND_SLAVE_LIST) {
00409 stream << string(" ", 0, level);
00410 stream << "Response to slave DSP list:\n";
00411 printOutList(outPtr, outPtr[-4]-6, in, level+1, stream, dumpUnknown, dumpRaw);
00412 } else if(primId == SEND_DATA) {
00413 stream << string(" ", 0, level);
00414 stream << "Response to SEND_DATA:\n";
00415 SEND_DATA_OUT &dataOut = *(SEND_DATA_OUT *)outPtr;
00416 stream << string(" ", 0, level + 1);
00417 stream << "pointer: " << dataOut.dataPtr << " length: 0x" << hex << dataOut.dataLength << dec << endl;
00418 } else if(primId == RW_SLAVE_MEMORY) {
00419 stream << string(" ", 0, level+1);
00420 stream << "Response to read slave memory\n";
00421 if(dumpRaw)
00422 printMemoryBlock(stream, outPtr, primLength-4, 8, level+1);
00423 } else {
00424 if(dumpUnknown)
00425 printMemoryBlock(stream, outPtr, primLength-4, 8, level+1);
00426 }
00427 }
00428
00429 outPtr += primLength-4;
00430 }
00431 unsigned long trailLength = *outPtr++;
00432 unsigned long trailCheck = *outPtr++;
00433 stream << string(" ", 0, level);
00434 if(in)
00435 stream << "Inlist ";
00436 else
00437 stream << "Outlist ";
00438 stream << "Trailer: length = " << trailLength << " check = 0x" << hex << trailCheck << dec << endl;
00439 stream << string(" ", 0, level);
00440 stream << "End of response\n";
00441 }
00442
00443 }
00444
00445 #ifdef HAVE_PRIM_NAMES
00446
00447 const char *getPrimName(int id) {
00448 for(int i=0; primNames[i].id != -1; i++) {
00449 if(primNames[i].id == id) {
00450 return primNames[i].name;
00451 }
00452 }
00453
00454 return "unknown";
00455 }
00456
00457 const char *getRegName(int id) {
00458 for(int i=0; regNames[i].id != -1; i++) {
00459 if(regNames[i].id == id) {
00460 return regNames[i].name;
00461 }
00462 }
00463
00464 return "unknown";
00465 }
00466
00467 const char *getTaskName(int id) {
00468 for(int i=0; taskNames[i].id != -1; i++) {
00469 if(taskNames[i].id == id) {
00470 return taskNames[i].name;
00471 }
00472 }
00473
00474 return "unknown";
00475 }
00476
00477 #endif
