TrimDac

One-per-channel digitial-to-analogue converters, which allow fine-tuning of the threshold across a particular chip.

There are 128 TrimDac s per ASIC, each of which can be set to one of 16 levels (4-bits). The size of the step between levels the trim range, can take one of 4 values for the chip, corresponding approximately to 3, 7, 10, or 14 mV per step.

The TrimDac s can be optimised using the TrimRange? test.