00001 /* 00002 * sct_structures.h 00003 * 00004 * A fresh look at what may be needed for the 00005 * SCT ROD configuration data structures 00006 * 00007 * This is a revised and expanded version of John Hill's "sct_structure.h" 00008 * which can be found here: 00009 * http://sctpixel.home.cern.ch/sctpixel/Cambridge/sct_structure.txt 00010 * 00011 * From our point of view, the layout of the structures is less important 00012 * than their content, so the ROD developers should feel free to suggest 00013 * alternative layouts and/or naming schemes. 00014 * 00015 * Version 0.8 PWP/GFM 2002.06.04 00016 * Version 1.0 PWP 2002.06.17 00017 * Version 1.1 PWP 2003.03.25 00018 * Version 1.2 DPSF 2003.03.27 00019 */ 00020 #include "processor.h" 00021 #include "bocStructure.h" 00022 00023 #ifndef SCT_STRUCT_H /* multiple inclusion protection */ 00024 #define SCT_STRUCT_H 00025 00026 #define N_SCT_MODULES 48 /* 48 modules directly attached +12 modules */ 00027 #define N_SCT_EXTMODULES 12 /* using redundant command links OFF ROD */ 00028 #define N_SCT_TOTMODULES ((N_SCT_MODULES)+(N_SCT_EXTMODULES)) 00029 00030 #define N_SCT_CHANS 128 00031 #define N_SCT_CHIPS 12 00032 00033 /* Default & off-ROD positions of a module's TTC fibres. The default primary 00034 TTC fibre location for a module is simply the module's position inside the 00035 structure set. */ 00036 #define DEFAULT_TTC 0x80 00037 #define OFF_ROD_TTC 0xff 00038 00039 /* Data Links which are turned off: */ 00040 #define DATA_LINK_OFF 0xff 00041 00042 /* Structure Definitions */ 00043 typedef struct { 00044 00045 /* This structure corresponds to the ABCD chip configuration register. 00046 * Aside from one correction to suit the ABCD3T chip (trimRange) it 00047 * is essentially the same as that proposed by John Hill. */ 00048 00049 UINT16 readoutMode : 2; 00050 UINT16 calibMode : 2; 00051 UINT16 trimRange : 2; 00052 UINT16 edgeDetect : 1; 00053 UINT16 mask : 1; 00054 UINT16 accumulate : 1; 00055 UINT16 inputBypass : 1; 00056 UINT16 outputBypass : 1; 00057 UINT16 master : 1; 00058 UINT16 end : 1; 00059 UINT16 feedThrough : 1; 00060 UINT16 padding : 2; /*pad to 16 bits */ 00061 00062 } ABCDConfig; 00063 00064 typedef struct{ 00065 00066 /* This structure holds calibration information about this 00067 * ABCD chip. None of these parameters was present in 00068 * John Hill's version - we probably hadn't thought of it 00069 * two years ago! */ 00070 00071 /* We store a functional representation of the response 00072 * curve (equivalent threshold as a function of charge) 00073 * so that we may request ROD to set the threshold to 00074 * a value specified in fC. */ 00075 00076 UINT8 rc_function; /* Used to denote the type of function which 00077 * has been fitted to the response curve, eg. 00078 * 0 - no calibration information 00079 * 1 - (can't remember, probably exponential) 00080 * 2 - second order polynomial 00081 * 3 - (can't remember, probably "Grillo" func) 00082 * 4 - straight line fit */ 00083 FLOAT32 rc_params[3]; /* Response Curve Fit */ 00084 00085 FLOAT32 c_factor; /* Capacitor Correction factor */ 00086 00087 UINT32 unused[3]; /* For data alignment */ 00088 /* Other calibration data is available from the wafer test - 00089 * but it's probably irrelevant. */ 00090 00091 /* We had a discussion about putting temperature correction 00092 * coefficients in here, but to avoid the complication of 00093 * delivering recent temperature data to ROD, we conclude 00094 * that temperature corrections are best done offline. */ 00095 00096 } ABCDCaldata; 00097 00098 typedef struct { 00099 00100 /* All registers except the TrimDAC registers. The contents of 00101 * these registers change more often than the TrimDAC settings 00102 * and will most often be loaded as a group. */ 00103 00104 ABCDConfig config; /* Configuration Register 16 bits */ 00105 00106 UINT16 unused; /* For data alignment */ 00107 UINT8 vthr; /* Threshold, 8 bits */ 00108 UINT8 vcal; /* Calibration Amplitude, 8 bits */ 00109 UINT8 delay; /* Strobe Delay, 6 bits */ 00110 UINT8 preamp; /* Preamp Bias Current, 5 bits */ 00111 UINT8 shaper; /* Shaper Current, 5 bits */ 00112 00113 UINT32 mask[4]; /* Mask Register, 128 bits */ 00114 } ABCDBasic; 00115 00116 typedef struct { 00117 00118 /* This structure includes all register settings and 00119 * calibration information for one ABCD chip. */ 00120 00121 UINT8 active; /* 1 -> participates in scans */ 00122 /* 0 -> register contents unchanged during scanning 00123 * (although the fixed values are still loaded) */ 00124 UINT8 address; /* In SCTDAQ we chose to associate a hardcoded 00125 * chip address with each location on a module. 00126 * That's fine as long as things work correctly. 00127 * If we allow the address to be configurable 00128 * we can recover from (a subset of possible) 00129 * address failure modes. */ 00130 00131 UINT8 unused; /* For data alignment */ 00132 00133 UINT8 target; /* <= I think this should be correct? */ 00134 00135 ABCDBasic basic; /* All registers apart from the TrimDACs */ 00136 00137 ABCDCaldata caldata; /* Calibration data for this chip */ 00138 00139 UINT8 trim[N_SCT_CHANS]; /* TrimDAC registers, 4 bits/channel 00140 * This could be more tightly packed, but 00141 * unless you need the space, this sounds 00142 * like an unnecessary complication... */ 00143 00144 } ABCDChip; 00145 00146 00147 typedef struct { 00148 00149 /* This structure includes all register settings and 00150 * calibration information for one ABCD module. */ 00151 00152 ABCDChip chip[N_SCT_CHIPS]; 00153 00154 UINT8 present; /* Module is physically present. Does not need setting 00155 externally; handled by the Master DSP. */ 00156 00157 UINT8 active; /* 1 -> participates in scans */ 00158 /* 0 -> registers unchanged during scanning */ 00159 UINT8 select; /* 1 -> use redundant clk/com; ID4=1 */ 00160 /* 0 -> use primary clk/com; ID4=0 */ 00161 00162 UINT8 groupId; /* The ID of the module's group. This is used to indicate 00163 which slave DSP will receive the module's data (if group 00164 based distribution is set), and also to allow different 00165 module groups to be triggered independently (for 00166 cross-talk studies). Valid range: [0,7] */ 00167 00168 BOCConfig *bocConfig; /* Pointer to the BOC configuration structure. 00169 Does not need setting externally; handled by the MDSP. */ 00170 UINT8 pTTC; /* primary TX channel (used when SELECT = 0) */ 00171 UINT8 rTTC; /* redundant TX channel (used when SELECT = 1) */ 00172 00173 UINT8 rx[2]; /* data links used by module: SCT: 0,1 Pixel 0, 0 & 1, or all. */ 00174 00175 UINT8 unused1[4]; 00176 UINT32 unused2[4]; /* align module structures on 8 word boundary */ 00177 00178 /* Each of a module's RX datalinks may or may not be in use 00179 * dependent upon the bypass configuration. ROD should 00180 * consider the settings of the MASTER bit of the 00181 * configuration register of each master chip when 00182 * choosing to enable or disable input streams, 00183 * reallocating buffers as necessary. */ 00184 00185 } ABCDModule; 00186 00187 #endif /*SCT_STRUCT_H */