00001
00002
00003 #ifndef SCTPIXELROD_RODDSPADDRESSES_H
00004 #define SCTPIXELROD_RODDSPADDRESSES_H
00005
00019 namespace SctPixelRod {
00020
00021 #include "processor.h"
00022 #include "memoryPartitions.h"
00023
00024
00025
00026
00027 const unsigned long PRIM_BUFF_BASE = MDSP_PRM_BFR_BASE;
00028 const unsigned long PRIM_BUFF_SIZE = MDSP_PRM_BFR_SZ;
00029 const unsigned long REPLY_BUFF_BASE = MDSP_REP_BFR_BASE;
00030 const unsigned long REPLY_BUFF_SIZE = MDSP_REP_BFR_SZ;
00031
00032
00033 const unsigned long TEXT_BUFF_SIZE = TXT_BFR_SZ;
00034 const unsigned long ERR_BUFF_BASE = ERR_BFR_BASE;
00035 const unsigned long INFO_BUFF_BASE = INFO_BFR_BASE;
00036 const unsigned long DIAG_BUFF_BASE = DIAG_BFR_BASE;
00037 const unsigned long XFER_BUFF_BASE = XFER_BFR_BASE;
00038
00039
00040 const unsigned long STATUS_REG[3] = {STATUS_REG_0, STATUS_REG_1, STATUS_REG_2};
00041 const unsigned long COMMAND_REG[2] = {COMMAND_REG_0, COMMAND_REG_0};
00042
00043
00044
00045 const unsigned long SLAVE_HPIC_BASE = 0x00780000;
00046 const unsigned long SLAVE_HPIA_BASE = SLAVE_HPIC_BASE+0x4;
00047 const unsigned long SLAVE_HPID_AUTO_BASE = SLAVE_HPIC_BASE+0x8;
00048 const unsigned long SLAVE_HPID_NOAUTO_BASE = SLAVE_HPIC_BASE+0xC;
00049 const unsigned long SLAVE_HPI_OFFSET = 0x20000;
00050
00051 const unsigned long SLAVE_EMIF_ADDR =0x01800010;
00052 const unsigned long SLAVE_IPRAM_ADDR = 0x00000000;
00053 const unsigned long SLAVE_IDRAM_ADDR = 0x80000000;
00054 const unsigned long SLAVE_CE2_ADDR = 0x02000000;
00055
00056 const unsigned long SLAVE_PRIM_BUFF_SIZE = SDSP_PRM_BFR_SZ;
00057 const unsigned long SLAVE_REPLY_BUFF_SIZE = SDSP_REP_BFR_SZ;
00058 const unsigned long SLAVE_PRIM_BUFF_BASE = SDSP_PRM_BFR_BASE;
00059 const unsigned long SLAVE_REPLY_BUFF_BASE = SDSP_REP_BFR_BASE;
00060
00061
00062 const long DSP_RESET_TIMEOUT = 30;
00063
00064 }
00065
00066 #endif // SCTPIXELROD_RODDSPADDRESSES_H