00001 /****************************************************************************** 00002 * 00003 * Title : ABCDscans.h 00004 * Version: 07 January 2003 00005 * Revised: 25 March 2003 00006 * 00007 * Description: Definitions of variable type numbers 00008 * Extracted from SCTDAQ's "sct_scans.h" 00009 * The numbering scheme is largely historic and may seem crazy 00010 * but I wish to keep it for reasons of backward compatibility 00011 * 00012 * Related files: ABCDconfig.c 00013 * Documentation: http://s.home.cern.ch/s/sct/public/sctdaq/sctdaq.html 00014 * 00015 * Author: Peter W Phillips, P.W.Phillips@rl.ac.uk 00016 * 00017 ******************************************************************************/ 00018 00019 #ifndef ABCD_SCANS_H /* multiple inclusion protection */ 00020 #define ABCD_SCANS_H 00021 00022 #include "processor.h" 00023 00024 /****************************************************************************** 00025 * Definitions * 00026 ******************************************************************************/ 00027 00028 /* Elapsed == elapsed time; equivalent of a NOP to permit general monitoring */ 00029 #define ST_ELAPSED 0 00030 00031 /* 00032 * ABCD3T DAC and Delay Settings 00033 */ 00034 00035 #define ST_VTHR 1 00036 #define ST_VCAL 2 00037 #define ST_STROBE_DELAY 3 00038 #define ST_PREAMP 4 00039 #define ST_SHAPER 5 00040 00041 #define ST_TRIM 6 /* set trim value of all channels */ 00042 #define ST_MASK 7 /* predefined mask patterns used during testing */ 00043 #define ST_ROLE 8 00044 #define ST_NMASK 9 /* number of channels to be masked */ 00045 00046 /* 00047 * ABCD3T Config Register Settings 00048 */ 00049 #define ST_CAL_MODE 10 /* calibMode */ 00050 #define ST_COMPRESSION 11 /* readoutMode */ 00051 #define ST_TRIM_RANGE 12 /* trimRange */ 00052 #define ST_EDGE_DETECT 13 /* edgeDetect */ 00053 #define ST_SEND_MASK 14 /* mask */ 00054 #define ST_ACCUMULATE 15 /* accumulate */ 00055 00056 #define ST_BYPASS 17 /* predefined redundancy configurations 00057 to be used during production testing 00058 PWP 01.11.00 */ 00059 #define ST_ACTIVE 18 /* set ACTIVE or INACTIVE */ 00060 00061 #define ST_TOKEN 19 /* a bit pattern that defines the bypass 00062 scheme allowing all combinations. A '1' 00063 means that the chip is read out, a '0' 00064 means that the chip is bypassed/dead */ 00065 00066 /* 00067 * Adjustment of ABCD3T DAC settings using the calibration (RC) data 00068 */ 00069 00070 #define ST_QTHR 41 00071 #define ST_QCAL 42 00072 #define ST_TARGET 43 /* Record of Trim Target PWP 06.12.02 */ 00073 #define ST_TTHR 44 /* Threshold in mV set wrt Trim Target PWP 06.12.02 */ 00074 00075 /* 00076 * BOC parameters 00077 * Several of these have direct parallels in SCTDAQ 00078 * - hence this might look a little wierd PWP 25.03.03 00079 */ 00080 00081 #define ST_RX_DELAY 20 /* same as ST_STREAM_DELAY in SCTDAQ */ 00082 #define ST_RX_DELAY0 21 /* same as ST_STREAM_DELAY0 in SCTDAQ */ 00083 #define ST_RX_DELAY1 22 /* same as ST_STREAM_DELAY1 in SCTDAQ */ 00084 00085 #define ST_RX_THRESHOLD 50 /* same as ST_OPTO_RX_THR in SCTDAQ */ 00086 #define ST_RX_THRESHOLD0 51 /* same as ST_OPTO_RX_THR0 in SCTDAQ */ 00087 #define ST_RX_THRESHOLD1 52 /* same as ST_OPTO_RX_THR1 in SCTDAQ */ 00088 00089 #define ST_TX_CURRENT 53 /* same as ST_OPTO_TX_DAC in SCTDAQ */ 00090 #define ST_TX_MARKSPACE 54 /* ??? ST_OPTO_TX_MKSNEG ??? */ 00091 #define ST_TX_DELAY 55 /* *** no direct parallel *** */ 00092 #define ST_TX_COARSE 56 /* same as ST_OPTO_TX_CDELAY */ 00093 #define ST_TX_FINE 57 /* same as ST_OPTO_TX_FDELAY */ 00094 00095 #define SCAN_STATIC 1 00096 00097 typedef struct { 00098 /* options for resetting modules (beginning of scan & between bins) */ 00099 UINT8 moduleInit; 00100 UINT8 binReset; 00101 UINT8 ECR; 00102 UINT8 BCR; 00103 } SCTScanReset; /* Start of scan reset options */ 00104 00105 00106 #endif /* ABCD_SCANS_H */