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rodConfiguration.h

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00001 /************************************************************************************
00002  * rodConfiguration.h
00003  *
00004  *  synopsis: Describes ROD specific hardware details, e.g. is this an SCT or a pixel
00005  *           ROD, how many formatter FPGAs are there...
00006  *
00007  *  Damon Fasching, UW Madison                            fasching@wisconsin.cern.ch
00008  *  Douglas Ferguson, UW Madison   (510) 486-5230         dpferguson@lbl.gov
00009  *
00010  *  modifications/bugs    
00011  *   - Moved rodConfiguration #defines here (were in primParams.h)   11.04.02 dpsf
00012  ************************************************************************************/
00013 #ifndef ROD_CONFIGURATION
00014 #define ROD_CONFIGURATION
00015 
00016 #include "processor.h"
00017 
00018 /* Some dataflow parameters */
00019 #define EFBS_PER_ROD               2
00020 #define FORMATTERS_PER_EFB         4
00021 #define FORMATTERS_PER_ROD         (FORMATTERS_PER_EFB*EFBS_PER_ROD)
00022 #define LINKS_PER_FORMATTER        12
00023 #define DATA_LINKS_PER_EFB         (LINKS_PER_FORMATTER*FORMATTERS_PER_EFB)
00024 #define DATA_LINKS_PER_ROD         (DATA_LINKS_PER_EFB * EFBS_PER_ROD)
00025 #define CTRL_LINKS_PER_ROD         (DATA_LINKS_PER_ROD / 2)
00026 #define STROBE_DELAYS_PER_BOC      24 
00027  
00028 /* number of slave DSPs */
00029 #if (defined(I_AM_MASTER_DSP) || defined(I_AM_NT_HOST) || defined(I_AM_LINUX_HOST))
00030   #define N_SLV_DSPS  4
00031 #endif
00032 #ifdef I_AM_SLAVE_DSP
00033   #define N_SLV_DSPS  1
00034 #endif
00035 
00036 /* 6713 phase lock loop registers & device config register; these are used by the MDSP
00037    while setting a Rev. E ROD's SDSP clocks. */
00038 #define PLL_TIMEOUT 5000000  // .5 sec.
00039 
00040 #define SDSP6713_PLLCSR    0x01b7c100
00041 #define SDSP6713_PLLM      0x01b7c110
00042 #define SDSP6713_PLLDIV0   0x01b7c114
00043 #define SDSP6713_DEVCFG    0x019c0200
00044 
00045 /* configuration data structures */
00046 struct SlvDspConfig {
00047     UINT8 present;
00048     UINT8 commOnOff;
00049     UINT8 type;
00050     UINT8 clkSpeed;
00051 };
00052 
00053 typedef struct RodConfig {
00054     UINT32 detector;
00055     UINT32 boardClockInMHz;
00056     UINT32 DSPClockInMHz;
00057     UINT32 numSlaves;
00058     UINT32 numSlvsCommOn;
00059     struct SlvDspConfig slvDspConfig[N_SLV_DSPS];
00060 } RodConfig;
00061 
00062 
00063 /* Some modes are additive; e.g. CALIBRATION +SIMULATION. The ROD will
00064    return an error for those modes which are incompatible. */
00065 
00066 /* NDT: Sets the data path according to the simulation type or link_data
00067         +capture,  sets the atlas running mode to true so that router is
00068         not allowed to apply back-pressure, and sets the link masks and
00069         assoc. variables according to the information stored in the 
00070         INIT module configuration set. Automatic inmem readout triggers an
00071         automatic readout of the inmems' link(s) into a MDSP buffer after
00072         completion of each serial stream output. */
00073 //"dummy" mode modifiers (=> exit cfg readback, evt capture, or simulation):  
00074 #define NOCAPTURE_MODE                    0
00075 #define NOSIMULATION_MODE                 0
00076 #define NORMAL_MODE                       0
00077 
00078 //mode modifiers:
00079 #define SIMULATION_MODE                   0x0001
00080 #define CONFIG_READBACK_MODE              0x0002
00081 #define INMEM_EVT_CAPTURE_MODE            0x0004
00082 #define INMEM_AUTO_READOUT_MODE           0x0008
00083 #define CALIBRATION_SLINK_OVERRIDE_MODE   0x0010
00084 
00085 //ROD modes:
00086 #define ROD_INIT_MODE            0x00010000 
00087 #define DATA_TAKING_MODE         0x00020000 
00088 #define CALIBRATION_MODE         0x00040000
00089 /* Continue-mode is a dummy mode which signals the routine to
00090    stay in the same mode while adding/removing a mode modifier. */
00091 #define CONTINUE_MODE            0x80000000
00092 
00093 /* routine flags: */
00094 #define SET_MODE        0
00095 #define STORE_MODE      1
00096 #define RESTORE_MODE    2
00097 #define MODIFY_MODE     3
00098 
00099     typedef struct RodModeCfg {
00100     UINT8  sim, cfgReadback, inmemEvtCapture, autoInmemReadout;
00101     UINT32 rodMode;
00102     #if  (  defined(I_AM_MASTER_DSP) \
00103           ||(defined(I_AM_NT_HOST) || defined(I_AM_LINUX_HOST)) )
00104         UINT32 rrifCmd[2], rtrCmdStat, evtsPerL1A;
00105         UINT32 lutSelect, cmdMask[2][2], fmtCfg[8];
00106         #ifdef PIXEL_ROD
00107         UINT32 fmt_evtsPerL1A[8];
00108         #endif
00109     #endif
00110     } RodModeCfg;
00111 
00112 
00113 
00114 #if  (defined(I_AM_MASTER_DSP) || defined(I_AM_NT_HOST) || defined(I_AM_LINUX_HOST))
00115     /* Link masks defined bitwise: set all masks on= CL on +DLP +LCFG on. Note that
00116        settings within the same group are mutually exclusive; the values are set so
00117        that the mask setting routine will ignore inappropriate mixtures. */
00118 
00119     #define DATA_LINK_MASKED  0x1  /* Dynamic modebits setting for disabled link */
00120     #define DATA_LINK_PLAY    0x3  /* Normal dyn. modebits setting for enabled link */
00121     #define DATA_LINK_SKIP    0x7  /* Sets link so that it skips over the next event */ 
00122     #define DATA_LINK_D1P1    0xe  /* Link will dump 1st event, play out 2nd. */ 
00123 
00124     #define COMMAND_LINK_OFF 0x40   
00125     #define COMMAND_LINK_ON  0x60   
00126 
00127     #define LINK_CFG_OFF     0x100   /* Link on; for initialization of ROD. */
00128     #define LINK_CFG_ON      0x300   /* Link off; for initialization of ROD. */
00129 
00130     /* Internal masks: */
00131     #define DATA_LINK      0x00f
00132     #define COMMAND_LINK   0x0f0
00133     #define LINK_CFG       0xf00
00134 
00135 
00136     /* Storage flag settings for setLinkMasks: */
00137     #define INIT_MASK             0
00138     #define SET_MASK              1
00139     #define UPDATE_MASK           2
00140     #define SWITCH_MASK           3
00141     #define STORE_MASK            4
00142     #define COMPUTE_MASK_DELTAS   5
00143 
00144     typedef struct FmtMask {
00145         UINT16 fmtCfg[FORMATTERS_PER_ROD];
00146         UINT32 dataLinkMask[3], unused;
00147     } FmtMask;
00148 
00149     typedef struct DynMask {
00150         /*                                   MB0/1 */
00151         UINT16 modeBits[FORMATTERS_PER_ROD][2];
00152     } DynMask;
00153 
00154     typedef struct CmdMask {
00155         UINT32 highMask;
00156         UINT32 lowMask, unused[2];
00157     } CmdMask;
00158     
00159     typedef struct DeltaMask {
00160         UINT32 modeBits;
00161         UINT8  cmdLine, fmtCfg, dataLinkMask, unused;
00162     } DeltaMask;
00163 
00164     #define DELTA_SP0_LO  1
00165     #define DELTA_SP0_HI  2
00166     #define DELTA_SP1_LO  4
00167     #define DELTA_SP1_HI  8
00168 
00169     #define DELTA_DFLT_MB0(fmt)  (1<<(4*(fmt) +0))
00170     #define DELTA_DFLT_MB1(fmt)  (1<<(4*(fmt) +1))
00171     #define DELTA_CRTV_MB0(fmt)  (1<<(4*(fmt) +2))
00172     #define DELTA_CRTV_MB1(fmt)  (1<<(4*(fmt) +3))
00173 
00174     #define DELTA_FMT_CFG(fmt)        (1<<(fmt))
00175     #define DELTA_DATA_LINK_MASK(i)   (1<<(i))
00176 
00177 
00178     /* The MaskConfigData structure  is used to set the command & data link masks
00179        when a new group of modules is being addressed. Up to 8 'mask sets' are
00180        defined; the 1st five and last two should be reserved for internal program
00181        use (esp. the last two). The INIT set should be set to represent the entire
00182        module set. */
00183     #define N_MASK_SETS   8
00184         #define MASK_SET_0     0       //Note: Used by internal routines.
00185         #define MASK_SET_1     1       //              ""
00186         #define MASK_SET_2     2       //              ""
00187         #define MASK_SET_3     3       //              ""
00188         #define MASK_SET_OFF   4       //Reserved.
00189         #define MASK_SET_INIT  5       //Should be set using a primlist on startup.
00190         #define MASK_SET_WORK0 6       //Work0 & 1 are general purpose.
00191         #define MASK_SET_WORK1 7
00192         #define MASK_SET_ALL   8       
00193 
00194     typedef struct MaskConfigData {
00195         CmdMask   cmdMask[2]; /* [0]= default / SP0  [1]= crtv. / SP1 */ 
00196         DynMask   dynMask[2];   
00197         FmtMask   fmtMask;
00198         DeltaMask deltaMask[N_MASK_SETS];
00199     } MaskConfigData;
00200 
00201 #endif
00202 
00203 /* An array of ModuleMaskData (defined in the c file) stores the mask configuration
00204    for each module; this is used by both the MDSP and SDSPs. */
00205 typedef struct ModuleMaskData {
00206     UINT8 cmdLine;
00207     UINT8 unused[3];
00208     UINT8 dataLine[4];
00209 } ModuleMaskData;
00210 
00211 #endif

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