A brief summary of UKL1 firmware versions: 2015-3.d Decrease high water mark in MEP buffer so it is at least one maximal event 2015-2.d Added recovery for BXID mismatch errors provoked by illegal command sequence from ODIN. 2015-1.d Corrections to fragmentation logic in egress. No changes to ingress. 2011-4.d The version used until the end of Run 1. Restart in 2015 revealed some fragmentation problems causing incomplete events not evident before. -- l1_egress lb_ecs, eth_formatter: Hardcode some IP header values and remove them from cfg. -- l1_egress_0x1c39f154 eth_formatter: Undo last change. ttc_b_decoder, gtflow_encoder etc.: Implement fast HPD reenable l1_ingress_0x22a7078f gtflow_decoder: Implement fast HPD reenable -- l1_egress_0x1c3bd141 fifo_gtin, evt_merger: Convert to token passing scheme when reading GT FIFO. evt_merger, eth_formatter: Remove trailing word in Ethernet packets. l1_ingress_0x22a4d77b Do not use ch_reset to reset l0_ingress l0_mux: Remove 2 of the 3 EndOfPacket when transmitting. l0_mux, evtfifo: Convert to token passing scheme when reading FIFO zero_supp: Implement squash feature (force pixel data to 0) l0_mux: Generate a consecutive evid error flag inhibit_ctrl: New component. Control of channel inhibits. -- l1_egress_1c385fa5 fifo_gtin: Remove multiple EndOfPacket when receiving. Better pipelining when transmitting. Revert buffer HWM to 4. evt_merger: Move tfc_req earlier. Use combinatorial mux - saves another clock. -- l1_egress_0x1c42a20d fifo_gtin: Note buffer HWM is 8 in this version but this seems to cause occasional buffer overflow. evt_merger: Optimise states in read FSM. -- l1_egress_0x1c4464d7 evt_merger, eth_formatter: rework MEP buffering to improve performance. Increase fragment buffer size. l1_ingress_0x2288c5fd zero_supp, evtfifo (replaces fifo_burst), l0_mux: various changes to improve usage of ingress links. Side effects are that header suppression and empty suppression are no longer optional. -- l1_egress_0x1c40a6fa ip_checksum: Changes to resets and require d(32)=1 to trigger state machine. fifo_gtin: Correct reset NOP state introduced in 0x1c391b9c evt_merger: Correct wrfifo FSM reset. Reset evid_15 on FE reset. fifo_gtin: Increase full threshold from 4 to 8 eth_formatter, ip_checksum, spi3tx : Remove use of dvalid signal in transmission. l1_ingress_0x22905488 New counter for NZ bytes used for empty header suppression (does not count ALICE placeholders). Change again reset of ingress_gol to avoid incorrect throttling by using new ch_reset synchronised to l0_mux. -- l1_egress_0x1c3c0b04 -- probably bad due to fifo_gtin change in 0x1c391b9c 32bit MEP counter -- l1_egress_0x1c391b9c -- probably bad due to fifo_gtin change Add NOP state for clean reset of rx state machine in fifo_gtin. Another modification to ethsa to ignore tenb. Try to shed some light on missing fragments. Modified eth_formatter to remove pathological fragment size problem. -- l1_ingress_0x2284a917 Use l1reset instead of cfg_inhibit to rest ingress_gol. Hope this fixes crashes when HPDs are disabled. Also mask throttle with cfg_inibit. l1_egress_0x1c327130 Modify ethsa state machine to not check for teop. May help to make more robust. -- l1_ingress_0x2286bd64 Implement congigurable threshold (0-7) on minimum number of bytes with hits for HPD to be transported. l1_egress_0x1c3a7669 Increase MEP buffer size to two maximum-size MEPs (128kB) and change from FIFO to dual buffer for timing. Increase TFC ROT and MEP counters to 32 bit and map to additional status registers. -- l1_egress_0x1c20c595 Correct reset of pipeline counters (change from asynchronous to synchronous) Add more status info -- l1_egress_0x1c201c15 Change to ingress configuration logic to allow multiple channel configuration per transaction l1_ingress_0x22869da3 Change to ingress configuration logic to allow multiple channel configuration per transaction -- l1_egress_0x1c1eb62f Add ethernet fragment counters Register PTPA_GBE in formatter l1_ingress_0x22887a33 Rework the resettable HPD inhibit. Use new ingress "actions" command. No longer uses reset command to reenable. -- l1_egress_0x1c193905 Use tfc_reset as throttle logic reset and replace L1ACC_TTC with ttc_a signal. l1_ingress_0x22887a33 Implement resettable inhibit flag (reset by l1reset) -- l1_egress_0x1c1075f0 Rework MEP building to improve timing Added some new status registers Modification to MEP building FSM for safety Use inhibit as reset of input FIFOs Change to use CLKDES1 for TFC clock (CLK40 does not have guaranteed timing) Include external timing constraints for TTCrx signals Add a wait state in fifo_gtin after receiving frame before asserting ready. Modify ingress-egress data transfer protocol (handle additional EOP words) Implement change to MEP destination TFC broadcast format Removed Precision safe FSM option again Changed handshake between GTIN FIFO and MEP builder l1_ingress_2282e395 Modify ingress-egress data transfer protocol (added 2 EOP words) -- l1_egress_0x1c1fd6d8 Rebuilt using Presision safe FSM option l1_ingress_0x2286251d Change to LED blink implementation Enabled Precision safe FSM option to avoid removal of others clause in gol_status_engine FSM (causing intermittent blocking of status data transmission on reset). Added TEMPERATURE=50C constraint -- l1_egress_0x1c142f21 Added NOP to fragment buffer read cycle in eth_formatter to correct downstream ip checksum calculation. Increased MEP buffer address width to use full buffer. l1_ingress_0x2273dbdf Make independent per-input L0 emulators (formerly one per ingress) -- Change from Leonardo to Precision for synthesis -- l1_egress_0x1c40ce00 Move TPA polling earlier into eth_formatter and modify algorithm for better streaming. Reassignment of signals to red LEDs. l1_egress_0x1c414a79 Correction to throttle output in ALICE mode. -- l1_egress_0x1c3ffd5e Change to transmission protocol between ingress and egress. l1_ingress_0x227ae43e Change to transmission protocol between ingress and egress. (Removal of output buffer). Increase HWM in event buffer from 16 to 32. Add optional empty HPD suppression. -- l1_egress_0x1c3c3075 Changed reset logic for status/flow GT Change ingress configuration mechanism Include support for pixel masking Implement L1 (partial) reset l1_ingress_0x227f8467 Changed reset logic for status/flow GT Changed ingress configuration mechanism Include support for pixel masking Implement L1 (partial) reset -- l1_egress_0x1c0966d9 Added extra pipelining in TFC FIFO occupancy counter to remove possible race. Registered TTCrx command signals in IOBs to control timing. Exclude broadcasts with [7..6]=00 from last broadcast status register. l1_ingress_0x2270c184 Moved ingress header fields -- l1_egress_0x1c0b29a6 Added USB-I2C bridge logic Moved ingress header fields Added TFC long broadcast capture register Implemented MEP truncation Added ingress ID to ingress header l1_egress_0x1c76328b Added GBE port number insertion into Ethernet source address. Added TTCRDY signal to status registers.