00001 /****************************************************************************** 00002 * 00003 * Title : ABCDscans.h 00004 * Version: 07 January 2003 00005 * 00006 * Description: Definitions of variable type numbers 00007 * Extracted from SCTDAQ's "sct_scans.h" 00008 * The numbering scheme is largely historic and may seem crazy 00009 * but I wish to keep it for reasons of backward compatibility 00010 * 00011 * Related files: ABCDconfig.c 00012 * Documentation: http://s.home.cern.ch/s/sct/public/sctdaq/sctdaq.html 00013 * 00014 * Author: Peter W Phillips, P.W.Phillips@rl.ac.uk 00015 * 00016 ******************************************************************************/ 00017 00018 #ifndef ABCD_SCANS_H /* multiple inclusion protection */ 00019 #define ABCD_SCANS_H 00020 00021 /****************************************************************************** 00022 * Definitions * 00023 ******************************************************************************/ 00024 00025 /* Elapsed == elapsed time; equivalent of a NOP to permit general monitoring */ 00026 #define ST_ELAPSED 0 00027 00028 /* 00029 * ABCD3T DAC and Delay Settings 00030 */ 00031 00032 #define ST_VTHR 1 00033 #define ST_VCAL 2 00034 #define ST_STROBE_DELAY 3 00035 #define ST_PREAMP 4 00036 #define ST_SHAPER 5 00037 00038 #define ST_TRIM 6 /* set trim value of all channels */ 00039 #define ST_MASK 7 /* predefined mask patterns used during testing */ 00040 #define ST_ROLE 8 00041 #define ST_NMASK 9 /* number of channels to be masked */ 00042 00043 /* 00044 * ABCD3T Config Register Settings 00045 */ 00046 #define ST_CAL_MODE 10 /* calibMode */ 00047 #define ST_COMPRESSION 11 /* readoutMode */ 00048 #define ST_TRIM_RANGE 12 /* trimRange */ 00049 #define ST_EDGE_DETECT 13 /* edgeDetect */ 00050 #define ST_SEND_MASK 14 /* mask */ 00051 #define ST_ACCUMULATE 15 /* accumulate */ 00052 00053 #define ST_BYPASS 17 /* predefined redundancy configurations 00054 to be used during production testing 00055 PWP 01.11.00 */ 00056 #define ST_ACTIVE 18 /* set ACTIVE or INACTIVE */ 00057 00058 #define ST_TOKEN 19 /* a bit pattern that defines the bypass 00059 scheme allowing all combinations. A '1' 00060 means that the chip is read out, a '0' 00061 means that the chip is bypassed/dead */ 00062 00063 /* 00064 * Adjustment of ABCD3T DAC settings using the calibration (RC) data 00065 */ 00066 00067 #define ST_QTHR 41 00068 #define ST_QCAL 42 00069 #define ST_TARGET 43 /* Record of Trim Target PWP 06.12.02 */ 00070 #define ST_TTHR 44 /* Threshold in mV set wrt Trim Target PWP 06.12.02 */ 00071 00072 00073 /* 00074 * BOC parameters 00075 * Several of these have direct parallels in SCTDAQ 00076 * - hence this might look a little wierd PWP 25.03.03 00077 */ 00078 00079 #define ST_RX_DELAY 20 /* same as ST_STREAM_DELAY in SCTDAQ */ 00080 #define ST_RX_DELAY0 21 /* same as ST_STREAM_DELAY0 in SCTDAQ */ 00081 #define ST_RX_DELAY1 22 /* same as ST_STREAM_DELAY1 in SCTDAQ */ 00082 00083 #define ST_RX_THRESHOLD 50 /* same as ST_OPTO_RX_THR in SCTDAQ */ 00084 #define ST_RX_THRESHOLD0 51 /* same as ST_OPTO_RX_THR0 in SCTDAQ */ 00085 #define ST_RX_THRESHOLD1 52 /* same as ST_OPTO_RX_THR1 in SCTDAQ */ 00086 00087 #define ST_TX_CURRENT 53 /* same as ST_OPTO_TX_DAC in SCTDAQ */ 00088 #define ST_TX_MARKSPACE 54 /* ??? ST_OPTO_TX_MKSNEG ??? */ 00089 #define ST_TX_DELAY 55 /* *** no direct parallel *** */ 00090 #define ST_TX_COARSE 56 /* same as ST_OPTO_TX_CDELAY */ 00091 #define ST_TX_FINE 57 /* same as ST_OPTO_TX_FDELAY */ 00092 00093 00094 #endif /* ABCD_SCANS_H */