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00036 #ifndef PRIM_PARAMS
00037 #define PRIM_PARAMS
00038
00039 #include "processor.h"
00040 #include "serialStreams.h"
00041 #include "scanControl.h"
00042 #include "bocStructure.h"
00043 #include "rodConfiguration.h"
00044 #include "router.h"
00045
00046
00047 #if defined(SCT_ROD)
00048 #include "primParams_sct.h"
00049 #elif defined(PIXEL_ROD)
00050 #include "primParams_pxl.h"
00051 #endif
00052
00053 #define PRIM_LIST_REVISION 112
00054
00055
00056 #define DEFAULT (0xFFFFFFFF)
00057
00058
00059
00060
00061
00062
00063
00064
00065
00066
00067
00068 #define COMMON_PRIMITIVES_BASE 0x0
00069
00070 enum {
00071 ECHO= COMMON_PRIMITIVES_BASE,
00072 SET_MESSAGE_MASK,
00073 PAUSE_LIST,
00074 EVENT_TRAP_SETUP,
00075 SET_MEMORY,
00076 COPY_MEMORY,
00077 MEMORY_TEST,
00078 SET_LED,
00079 FLASH_LED,
00080 SEND_DATA,
00081 MODULE_MASK,
00082 SET_TRIGGER,
00083 START_TASK,
00084 TASK_OPERATION,
00085
00086 #ifndef NEWDEF
00087 TEST,
00088
00089 #else
00090 ZEN_PRIM,
00091
00092 #endif
00093
00094 WRITE_BUFFER,
00095
00096 LAST_COMMON_PRIMITIVE
00097 };
00098
00099 #define NUM_COMMON_PRIMITIVES ((LAST_COMMON_PRIMITIVE)-(COMMON_PRIMITIVES_BASE))
00100
00101
00102
00103 #define R_ECHO 100
00104
00105
00106
00107 #define R_SET_MESSAGE_MASK 100
00108 struct SET_ERRMSG_MASK_IN {
00109 UINT32 messageMask;
00110 };
00111
00112
00113
00114 #define R_PAUSE_LIST 100
00115
00116
00117
00118
00119
00120
00121
00122
00123
00124
00125
00126 #define R_EVENT_TRAP_SETUP 103
00127 struct EVENT_TRAP_SETUP_IN {
00128 UINT32 slvBits, numberOfEvents, timeoutInUsec;
00129 UINT32 extRouterSetup, distribute;
00130 UINT32 releaseFrames, permitBackPressure, dataMode, sLink,
00131 format, trapStray, iterLimit;
00132 UINT32 trapConfig[2], trapExclusionFlag[2], trapFunction[2],
00133 trapMatch[2], trapModulus[2], trapRemainder[2];
00134 };
00135
00136 struct EVENT_TRAP_SETUP_OUT {
00137 UINT32 errorCode;
00138 };
00139
00140 #define COLLECT_FOREVER 0
00141 #define KEEP_EVENTS 0
00142
00143 #define TRAP_DISTRIB_PRIMARY 0
00144 #define TRAP_DISTRIB_SECONDARY 1
00145 #define TRAP_DISTRIB_BOTH 2
00146 #define TRAP_DISTRIB_NEITHER 3
00147
00148 #define TRAP_FMT_NORMAL 0
00149 #define TRAP_FMT_ERROR 1
00150
00151
00152 #define R_SET_MEMORY 100
00153 struct SET_MEMORY_IN {
00154 UINT32 *start, size, val;
00155 };
00156
00157
00158 #define R_COPY_MEMORY 100
00159 struct COPY_MEMORY_IN {
00160 UINT32 *source, *destination, size;
00161 };
00162
00163
00164 #define R_MEMORY_TEST 102
00165 struct MEMORY_TEST_IN {
00166 UINT32 *start, size, repetitions[6], errorsBeforeFail, continueOnError;
00167 UINT32 nReads, dmaFlag;
00168 };
00169
00170 struct MEMORY_TEST_OUT {
00171 UINT32 returnCode;
00172 };
00173
00174
00175 #define R_SET_LED 104
00176 struct SET_LED_IN {
00177 UINT32 ledNum, ledState;
00178 };
00179
00180 #define YELLOW_LED 0
00181 #define GREEN_LED 1
00182 #define RED_LED 2
00183
00184 #define OFF 0
00185 #define ON 1
00186 #define TOGGLE 2
00187
00188
00189 #define R_FLASH_LED 103
00190 struct FLASH_LED_IN {
00191 UINT32 ledNum, period, numTimes;
00192 };
00193
00194
00195 #define R_SEND_DATA 103
00196 struct SEND_DATA_IN {
00197 UINT32 dataType, auxVal, repBufferFlag, timeout;
00198 };
00199 struct SEND_DATA_OUT {
00200 void *dataPtr;
00201 UINT32 dataLength;
00202 };
00203
00204 #define REPLY_POINTER 0
00205 #define REPLY_DIRECT_DATA 1
00206
00207 #define MAP_DATA 0x00
00208 #define PRIMITIVE_DATA 0x01
00209
00210 #define MIRROR_DATA 0x10
00211 #define ROUTER_DATA 0x11
00212 #define STREAM_DATA 0x12
00213
00214 #define EVENT_DATA 0x20
00215 #define HISTOGRAM_DATA 0x21
00216 #define OCCUPANCY_DATA 0x22
00217 #define FIT_DATA 0x23
00218 #define BIN_DATA 0x24
00219 #define ERROR_DATA 0x25
00220
00221
00222
00223
00224 #define R_MODULE_MASK 101
00225
00226 #if defined(I_AM_SLAVE_DSP)
00227 struct MODULE_MASK_IN {
00228 ModuleMaskData moduleMaskData[N_TOTMODULES];
00229 };
00230 #else
00231 struct MODULE_MASK_IN {
00232 UINT32 moduleNum, port, useStructSet, passOn, slvBits;
00233 UINT32 cmdLine, dataLine[4];
00234 UINT32 cfg, modMask[2], maskType, storage, maskSet;
00235 };
00236 #endif
00237
00238
00239
00240
00241 #define R_SET_TRIGGER 102
00242 struct SET_TRIGGER_IN {
00243 struct CmdList cmdList[2];
00244 UINT32 slvBits;
00245 UINT16 cmdBuff, preBuilt;
00246 UINT32 chipAddress, bin, set;
00247 UINT32 repetitions, interval;
00248 UINT32 preBuiltDataOffset[2];
00249 UINT16 incCmd[2];
00250 UINT32 incData[2];
00251 };
00252
00253
00254 #define SP0 0
00255 #define SP1 1
00256 #define SP_BOTH 2
00257
00258 #define R_START_TASK 101
00259
00260
00261
00262
00263
00264
00265
00266
00267 #define R_HISTOGRAM_CTRL_TASK 107
00268
00269 #if defined(SCT_ROD)
00270
00271 struct XPair {
00272 FLOAT32 x0, delta_x;
00273 };
00274 struct RangeList {
00275 struct XPair xPair[5];
00276 };
00277
00278 struct HISTOGRAM_CTRL_TASK_IN {
00279 UINT8 slvBits, port, configRegister[2];
00280
00281 UINT8 configSctSet, dataSet;
00282 UINT8 groupRangeMap[2];
00283
00284 UINT8 groupDSPMap[4];
00285
00286 UINT8 groupSPMap[2];
00287 UINT8 globalCtrl, syncLevel;
00288
00289 UINT32 *histoBase;
00290
00291 UINT8 doChipOcc, dataFormat, binSize, unused1;
00292 UINT8 extSetup, dataPath, capture, useRangeList ;
00293
00294 UINT32 repetitions, nBins, bin0;
00295
00296 struct RangeList rangeList[2];
00297 FLOAT32 *dataPtr[2];
00298
00299 struct CmdList triggerSequence[2];
00300 UINT8 incCmd[2];
00301 UINT8 calLineLoop;
00302 UINT8 distributionToggle;
00303
00304 UINT32 incData[2];
00305
00306 UINT32 genData[10];
00307 };
00308
00309 struct HISTO_CTRL_TASK_IN {
00310 ScanControl scanControl;
00311 };
00312
00313 #elif defined(PIXEL_ROD)
00314 struct HISTOGRAM_CTRL_TASK_IN {
00315 ScanControl scanControl;
00316 };
00317
00318 #endif
00319
00320 #define MODULE_BASIC 0
00321 #define MODULE_TRIM 1
00322 #define MODULE_ALL 2
00323
00324 #define EXT_SETUP_NONE 0
00325 #define EXT_SETUP_RCF 1
00326 #define EXT_SETUP_ROUTER 2
00327 #define EXT_SETUP_SET 4
00328 #define EXT_SETUP_HISTO 8
00329 #define EXT_SETUP_HTASK 16
00330
00331 #define DATA_PATH_NORMAL 0
00332 #define DATA_PATH_INMEM 1
00333
00334 #define MODULE_GROUP 0
00335 #define ROUTER_DISTRIB 1
00336
00337 #define SYNC_NEWBIN 0
00338 #define SYNC_TOTAL 1
00339
00340 struct HISTOGRAM_CTRL_TASK_OUT {
00341 UINT32 totalTime;
00342 UINT32 slvProcTime[4];
00343 UINT32 *dataPtr, dataLength;
00344 };
00345
00346 #define R_MIRROR_TASK 101
00347 struct MIRROR_TASK_IN {
00348 UINT32 slvBits, mirrorFreq, *mirrorBase,
00349 *mirrorSlvBase, mirrorLen;
00350 };
00351
00352 #define MIRROR_DEFAULT_BASE 0x80008000
00353
00354 #define R_TRAP_REQ_TASK 101
00355 struct TRAP_REQ_TASK_IN {
00356 UINT32 slvBits, watchFreq;
00357 };
00358
00359
00360 #define R_HISTOGRAM_TASK 100
00361 struct HISTOGRAM_TASK_IN {
00362 UINT32 nEvents, controlFlag;
00363 };
00364
00365
00366 #define MASTER_HREG 0
00367 #define LOCAL_INC 1
00368 #define LOCAL_SET_TRIG 2
00369
00370 struct HISTOGRAM_TASK_OUT {
00371 UINT32 nEvents, binsDone;
00372 FLOAT32 avgProcTime;
00373 UINT32 *dataPtr, dataLength;
00374 };
00375
00376 #define R_TRAP_TASK 100
00377 struct TRAP_TASK_IN {
00378 UINT32 nEvents, reloadInterval, trapType, eventType,
00379 *trapBufferBase, trapBufferLength;
00380 };
00381
00382 struct TRAP_TASK_OUT {
00383 UINT32 nEvents, dataLen;
00384 UINT32 *bufferBase, bufferLen;
00385 };
00386
00387 #define R_OCCUPANCY_TASK 100
00388 struct OCCUPANCY_TASK_IN {
00389 UINT32 nEvents, nFilters, splitFlag;
00390 char filter[16];
00391 };
00392
00393 #define R_ERROR_TASK 101
00394 struct ERROR_TASK_IN {
00395 UINT32 errorType;
00396 };
00397
00398
00399
00400
00401
00402
00403
00404
00405
00406
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00432
00433
00434 #define MAX_LINKS 96
00435
00436 enum {
00437 SCT_FEERROR=0,
00438 SCT_PREAMBLE,
00439 SCT_TIMEOUT,
00440 SCT_L1ERROR,
00441 SCT_BCERROR,
00442 SCT_TRAILER,
00443 SCT_HTLIMIT,
00444 SCT_OVERFLOW,
00445 SCT_HITERROR1,
00446 SCT_HITERROR2,
00447 MAX_ERRORS
00448 };
00449
00450 struct LINK_INFO {
00451 UINT32 nErrEvents;
00452 UINT32 nErrors;
00453
00454 UINT32 theChip;
00455 UINT32 theChannel;
00456 UINT32 theError;
00457
00458 UINT16 errCount[MAX_ERRORS];
00459
00460 UINT8 module;
00461 UINT8 stream;
00462
00463 UINT8 unused[2];
00464 };
00465
00466 struct ERROR_INFO {
00467 UINT32 nErrEvents;
00468 UINT32 nErrors;
00469
00470 struct LINK_INFO linkInfo[MAX_LINKS +1];
00471 };
00472
00473 struct ERROR_TASK_OUT {
00474 UINT32 nErrEvents;
00475 UINT32 nErrors;
00476 };
00477
00478 #define R_RESYNCH_TASK 100
00479 struct RESYNCH_TASK_IN {
00480 UINT32 errorType;
00481 };
00482
00483
00484
00485
00486
00487 struct GEN_TASK_OUT {
00488 void *dataPtr;
00489 UINT32 dataLength;
00490 };
00491
00492 union TASK_STRUCTURES_OUT {
00493 struct HISTOGRAM_CTRL_TASK_OUT histoCtrlTaskOut;
00494 struct HISTOGRAM_TASK_OUT histogramTaskOut;
00495 struct TRAP_TASK_OUT trapTaskOut;
00496 struct ERROR_TASK_OUT errorTaskOut;
00497 struct GEN_TASK_OUT genTaskOut;
00498 };
00499
00500
00501
00502 #define MAX_NUM_TASKS 5
00503
00504
00505
00506 #define MASTER_TASK_BASE (0x10)
00507 #define SLAVE_TASK_BASE (0x20)
00508
00509 enum {
00510 HISTOGRAM_CTRL_TASK= MASTER_TASK_BASE,
00511 MIRROR_TASK,
00512 TRAP_REQ_TASK,
00513
00514 HISTOGRAM_TASK= SLAVE_TASK_BASE,
00515 TRAP_TASK,
00516 OCCUPANCY_TASK,
00517 ERROR_TASK,
00518 RESYNCH_TASK
00519 };
00520
00521
00522 #define ALL_SLAVESX 5
00523
00524 #define LAST_MASTER_TASK (TRAP_REQ_TASK)
00525 #define NUM_MASTER_TASKS ((LAST_MASTER_TASK)-(MASTER_TASK_BASE)+1)
00526
00527 #define LAST_SLAVE_TASK (RESYNCH_TASK)
00528 #define NUM_SLAVE_TASKS ((LAST_SLAVE_TASK)-(SLAVE_TASK_BASE)+1)
00529
00530 #if defined(I_AM_MASTER_DSP)
00531 #define LAST_TASK (LAST_MASTER_TASK)
00532 #define NUM_TASKS (NUM_MASTER_TASKS)
00533 #define TASK_BASE (MASTER_TASK_BASE)
00534 #elif defined(I_AM_SLAVE_DSP)
00535 #define LAST_TASK (LAST_SLAVE_TASK)
00536 #define NUM_TASKS (NUM_SLAVE_TASKS)
00537 #define TASK_BASE (SLAVE_TASK_BASE)
00538 #endif
00539
00540 union TASK_STRUCTURES_IN {
00541 struct HISTOGRAM_CTRL_TASK_IN histoCtrlTaskIn;
00542 struct HISTO_CTRL_TASK_IN scanCtrlIn;
00543 struct MIRROR_TASK_IN mirrorMemoryTaskIn;
00544 struct TRAP_REQ_TASK_IN trapRequestTaskIn;
00545
00546 struct HISTOGRAM_TASK_IN histogramTaskIn;
00547 struct TRAP_TASK_IN trapTaskIn;
00548 struct OCCUPANCY_TASK_IN occupancyTaskIn;
00549 struct ERROR_TASK_IN errorTaskIn;
00550 struct RESYNCH_TASK_IN resynchTaskIn;
00551 };
00552
00553 struct START_TASK_IN {
00554 UINT32 taskType, taskRevision, priority, completionFlag;
00555 union TASK_STRUCTURES_IN taskStruct;
00556 };
00557
00558
00559 #define R_TASK_OPERATION 100
00560 struct TASK_OPERATION_IN {
00561 UINT32 taskType, taskOperation, data;
00562 };
00563
00564 #define TASK_STOP 0
00565 #define TASK_PAUSE 1
00566 #define TASK_RESUME 2
00567 #define TASK_QUERY 3
00568 #define TASK_RESET 4
00569 #define TASK_SETPRIORITY 5
00570
00571 #define R_WRITE_BUFFER 101
00572 struct WRITE_BUFFER_IN {
00573 UINT32 buffer;
00574 char string[2396];
00575 };
00576
00577 #define WRITE_BUFFER_ERR 0
00578 #define WRITE_BUFFER_INFO 1
00579 #define WRITE_BUFFER_DIAG 2
00580 #define WRITE_BUFFER_XFER 3
00581
00582 #define R_SET_BIN 100
00583 typedef struct {
00584 #if defined(I_AM_MASTER_DSP)
00585 UINT32 slvBits;
00586 #endif
00587
00588 UINT32 bin;
00589 } SetBinIn;
00590
00591
00592
00593
00594 #define SLAVE_PRIMITIVES_BASE 0x1000
00595
00596 #ifndef NEWDEF
00597 enum {
00598 START_EVENT_TRAPPING= SLAVE_PRIMITIVES_BASE,
00599 STOP_EVENT_TRAPPING,
00600 HISTOGRAM_SETUP,
00601
00602 LAST_SLAVE_PRIMITIVE
00603 };
00604
00605 #else
00606 enum {
00607 START_EVENT_TRAPPING= SLAVE_PRIMITIVES_BASE,
00608 STOP_EVENT_TRAPPING,
00609 LAST_SLAVE_PRIMITIVE
00610 };
00611
00612 #endif
00613
00614 #define NUM_SLAVE_PRIMITIVES ((LAST_SLAVE_PRIMITIVE)-(SLAVE_PRIMITIVES_BASE))
00615
00616 #define R_START_EVENT_TRAPPING 101
00617
00618 #define R_STOP_EVENT_TRAPPING 100
00619
00620
00621
00622
00623 #define MASTER_PRIMITIVES_BASE 0x2000
00624
00625 enum {
00626 RW_SLAVE_MEMORY= MASTER_PRIMITIVES_BASE,
00627 TRANS_SERIAL_DATA,
00628 START_SLAVE_EXECUTING,
00629 CONFIG_SLAVE,
00630 RW_REG_FIELD,
00631 POLL_REG_FIELD,
00632 RW_FIFO,
00633 SEND_SLAVE_LIST,
00634 START_SLAVE_LIST,
00635 SLAVE_LIST_OP,
00636 BUILD_STREAM,
00637 SEND_STREAM,
00638
00639 #ifndef NEWDEF
00640 RW_MODULE_DATA,
00641 SEND_CONFIG,
00642 #endif
00643
00644 DSP_RESET,
00645 SET_ROD_MODE,
00646
00647 #ifndef NEWDEF
00648 RW_MODULE_VARIABLE,
00649 #endif
00650
00651 RW_BOC_DATA,
00652 BOC_HISTOGRAM,
00653 WRITE_FLASH,
00654 LAST_MASTER_PRIMITIVE
00655 };
00656
00657 #define NUM_MASTER_PRIMITIVES ((LAST_MASTER_PRIMITIVE)-(MASTER_PRIMITIVES_BASE))
00658
00659
00660 #define R_RW_SLAVE_MEMORY 100
00661 struct RW_SLAVE_MEMORY_IN {
00662 UINT32 slaveNumber;
00663 UINT32 readNotWrite;
00664 UINT32 *slaveAddress;
00665 UINT32 *masterAddress;
00666 UINT32 numWords;
00667 };
00668
00669
00670 #define R_TRANS_SERIAL_DATA 100
00671 struct TRANS_DATA {
00672 UINT32 port0Data;
00673 UINT32 port1Data;
00674 };
00675 struct TRANS_SERIAL_DATA_IN {
00676 UINT32 captureSerOn;
00677 UINT32 streamLen[2], *streams;
00678 };
00679
00680
00681 #define R_START_SLAVE_EXECUTING 104
00682 struct START_SLAVE_EXECUTING_IN {
00683 UINT32 slaveNumber;
00684 UINT32 commOnOff;
00685 UINT32 slaveType;
00686 UINT32 timeoutInUsec;
00687 };
00688 struct START_SLAVE_EXECUTING_OUT {
00689 UINT32 slaveNumber;
00690 };
00691
00692
00693 #define SLV_DSP_COMM_OFF 0
00694 #define SLV_DSP_COMM_ON 1
00695
00696
00697 #define SLV_DSP_UNCONFIGURED 0
00698 #define SLAVE_CALIBRATE 1
00699 #define SLAVE_MONITOR 2
00700 #define SLAVE_ERROR_CHECK 3
00701 #define SLAVE_MEMORY_TEST 4
00702
00703
00704 #define R_CONFIG_SLAVE 102
00705 struct CONFIG_SLAVE_IN {
00706 UINT32 slaveNumber;
00707 UINT32 commOnOff;
00708 UINT32 slaveType;
00709 };
00710
00711
00712
00713
00714
00715
00716
00717
00718
00719 #define R_RW_REG_FIELD 105
00720 struct RW_REG_FIELD_IN {
00721 UINT32 registerID;
00722 UINT32 offset;
00723 UINT32 width;
00724 UINT32 readNotWrite;
00725 UINT32 dataIn;
00726 };
00727 struct RW_REG_FIELD_OUT {
00728 UINT32 dataOut;
00729 };
00730
00731
00732
00733
00734
00735
00736
00737
00738
00739 #define R_POLL_REG_FIELD 105
00740 struct POLL_REG_FIELD_IN {
00741 UINT32 registerID;
00742 UINT32 offset;
00743 UINT32 width;
00744 UINT32 desiredValue;
00745 UINT32 timeoutInUsec;
00746 };
00747 struct POLL_REG_FIELD_OUT {
00748 UINT32 found;
00749 };
00750
00751
00752
00753
00754
00755
00756
00757
00758
00759
00760
00761
00762
00763
00764
00765 #define R_RW_FIFO 104
00766 struct RW_FIFO_IN {
00767 UINT32 fifoId;
00768 UINT32 bank;
00769 UINT32 readNotWrite;
00770 UINT32 numElements;
00771 UINT32 *dataBaseAdr;
00772 };
00773 struct RW_FIFO_OUT {
00774 UINT32 bytesXfrd;
00775 };
00776
00777 #define INPUT_MEM 0x0
00778 #define DEBUG_MEM 0x1
00779 #define EVENT_MEM 0x2
00780 #define TIM_MEM 0x3
00781 #define BANK_A 0x0
00782 #define BANK_B 0x1
00783 #define BANK_C 0x2
00784
00785
00786
00787
00788
00789
00790
00791
00792
00793
00794
00795
00796 #define R_SEND_SLAVE_LIST 103
00797 struct SEND_SLAVE_LIST_IN {
00798 UINT32 slaveNumber;
00799 UINT32 listLength;
00800 UINT32 *slavePrimList;
00801 UINT32 *slaveRepData;
00802 };
00803
00804
00805
00806
00807
00808 #define R_START_SLAVE_LIST 103
00809 struct START_SLAVE_LIST_IN {
00810 UINT32 slaveNumber;
00811 UINT32 pauseMasterList;
00812 UINT32 getSlaveReply;
00813 };
00814
00815
00816 #define R_SLAVE_LIST_OP 101
00817 struct SLAVE_LIST_OP_IN {
00818 UINT32 slaveNumber;
00819 UINT32 listOp;
00820 };
00821
00822 #define LIST_PAUSE 0
00823 #define LIST_RESUME 1
00824 #define LIST_ABORT 2
00825
00826
00827
00828 #define R_BUILD_STREAM 102
00829 struct BUILD_STREAM_IN {
00830 struct CmdList cmdList;
00831 UINT32 port, reset, chip, fibre;
00832 UINT32 dataLen;
00833 UINT32 *data;
00834
00835 };
00836
00837 #define R_SEND_STREAM 100
00838 struct SEND_STREAM_IN {
00839 UINT32 port, captureSerOn;
00840 };
00841
00842 #define R_DSP_RESET 100
00843 struct DSP_RESET_IN {
00844 UINT32 slvBits, forceSync, nAttempts, timeOut;
00845 };
00846
00847 #define R_SET_ROD_MODE 101
00848 struct SET_ROD_MODE_IN {
00849 UINT32 mode, flag, fifoSetup, nBits, delay, evtsPerL1A, message;
00850 };
00851
00852 #define R_RW_BOC_DATA 100
00853 struct RW_BOC_DATA_IN {
00854 UINT32 read, sendToBoc, dataLen, *data;
00855 };
00856 struct RW_BOC_DATA_OUT {
00857 BOCConfig bocCfgData;
00858 };
00859
00860 #define R_BOC_HISTOGRAM 100
00861 struct BOC_HISTOGRAM_IN {
00862 UINT32 numSamples, numLoops;
00863 };
00864 struct BOC_HISTOGRAM_OUT {
00865 UINT32 histo[96][2];
00866 };
00867
00868 #define R_WRITE_FLASH 100
00869 typedef struct {
00870 void *buffPtr;
00871 UINT32 offset, length;
00872 } WriteFlashIn;
00873
00874 #if defined(I_AM_HOST)
00875 #if defined(SCT_ROD)
00876 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00877 +(NUM_SLAVE_PRIMITIVES) \
00878 +(NUM_MASTER_PRIMITIVES) \
00879 +(NUM_COMMON_SCT_PRIMITIVES) \
00880 +(NUM_SLAVE_SCT_PRIMITIVES) \
00881 +(NUM_MASTER_SCT_PRIMITIVES) )
00882
00883 #elif defined(PIXEL_ROD)
00884 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00885 +(NUM_SLAVE_PRIMITIVES) \
00886 +(NUM_MASTER_PRIMITIVES) \
00887 +(NUM_COMMON_PIXEL_PRIMITIVES) \
00888 +(NUM_SLAVE_PIXEL_PRIMITIVES) \
00889 +(NUM_MASTER_PIXEL_PRIMITIVES) )
00890 #endif
00891
00892 #elif defined(I_AM_MASTER_DSP)
00893 #if defined(SCT_ROD)
00894 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00895 +(NUM_MASTER_PRIMITIVES) \
00896 +(NUM_COMMON_SCT_PRIMITIVES) \
00897 +(NUM_MASTER_SCT_PRIMITIVES) )
00898
00899 #elif defined(PIXEL_ROD)
00900 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00901 +(NUM_MASTER_PRIMITIVES) \
00902 +(NUM_COMMON_PIXEL_PRIMITIVES) \
00903 +(NUM_MASTER_PIXEL_PRIMITIVES) )
00904 #endif
00905
00906 #elif defined(I_AM_SLAVE_DSP)
00907 #if defined(SCT_ROD)
00908 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00909 +(NUM_SLAVE_PRIMITIVES) \
00910 +(NUM_COMMON_SCT_PRIMITIVES) \
00911 +(NUM_SLAVE_SCT_PRIMITIVES) )
00912
00913 #elif defined(PIXEL_ROD)
00914 #define NUM_PRIMITIVES ( (NUM_COMMON_PRIMITIVES) \
00915 +(NUM_SLAVE_PRIMITIVES) \
00916 +(NUM_COMMON_PIXEL_PRIMITIVES) \
00917 +(NUM_SLAVE_PIXEL_PRIMITIVES) )
00918 #endif
00919
00920 #endif
00921
00922 #include "convertParams.h"
00923
00924
00925
00926 #if (defined(I_AM_MASTER_DSP) || defined(I_AM_SLAVE_DSP))
00927 INT32 noPrimitive(PrimData *);
00928
00929 INT32 echo(PrimData *);
00930 INT32 setMessageMask(PrimData *);
00931 INT32 pauseList(PrimData *);
00932 INT32 eventTrapSetup(PrimData *);
00933 INT32 setMemory(PrimData *);
00934 INT32 copyMemory(PrimData *);
00935 INT32 memoryTest(PrimData *);
00936 INT32 setLed(PrimData *);
00937 INT32 flashLed(PrimData *);
00938 INT32 sendData(PrimData *);
00939 INT32 moduleMask(PrimData *);
00940 INT32 setTrigger(PrimData *);
00941 INT32 startTask(PrimData *);
00942 INT32 taskOperation(PrimData *);
00943
00944 INT32 writeBuffer(PrimData *);
00945
00946 INT32 startEventTrapping(PrimData *);
00947 INT32 stopEventTrapping(PrimData *);
00948
00949 INT32 rwSlaveMemory(PrimData *);
00950 INT32 transSerialData (PrimData *);
00951 INT32 startSlaveExecuting(PrimData *);
00952 INT32 configSlave(PrimData *);
00953 INT32 rwRegField(PrimData *);
00954 INT32 pollRegField(PrimData *);
00955 INT32 rwFifo(PrimData *);
00956 INT32 sendSlaveList(PrimData *);
00957 INT32 startSlaveList(PrimData *);
00958 INT32 slaveListOp(PrimData *);
00959 INT32 buildStream(PrimData *);
00960 INT32 sendStream(PrimData *);
00961 INT32 dspReset(PrimData *);
00962 INT32 setRodMode(PrimData *);
00963 INT32 rwBocData(PrimData *);
00964 INT32 bocHistogram(PrimData *);
00965
00966 INT32 writeFlash(PrimData *);
00967
00968 #endif
00969 #endif