RCC-TIM Interface Requirements

Draft 0.5

15 July 1999

J.C.Hill (hill@hep.phy.cam.ac.uk)

This document has been significantly rewritten since version 0.4, but is still to be considered preliminary. Feedback welcome.

Introduction

It is not clear yet how much RCC-TIM interaction will take place during global running. What follows is my best guess based on discussions in the DIG, but further clarification awaits the release of the T/DAQ proposal on what DAQ functionality might be provided in the RCC.

Requirements

  1. RCC will communicate with TIM via VME.

    Addressing mode is not yet a critical factor - CLOAC uses A24D16, and this would certainly be adequate for the RCC-TIM interface in isolation, but RCC-ROD interfacing has a bearing also.

  2. RCC requires read and write access to the TIM registers.

    For monitoring purposes, RCC needs to be able to read the registers on the TIM to confirm the correct operational conditions. RCC needs write access to set up the TIM in global mode, and in addition to initiate commands in standalone mode.

  3. RCC will initialise the TIM registers to set up the appropriate modes.

    The registers on board need setting after power up, and whenever conditions change.

  4. RCC can trigger TIM to generate certain commands.

    TIM will generate certain fast commands (Bunch Crossing, event ID, L1A, ECR, BCR, CAL) based on a single VME command from the RCC. Slow commands will be sent directly from the ROD.

  5. TIM can interrupt RCC in case of errors.

    If the TIM identifies a problem, it may need to notify the RCC, so that appropriate action can be taken.

  6. TIM may interrupt RCC in standalone mode when it gets an event trigger (ie. L1A).

    This is to allow for single event mode of readout.

This file is http://www.hep.phy.cam.ac.uk/atlas/hill/rcc_tim.html